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From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <Mark.Rutland@arm.com>,
	"jason@lakedaemon.net" <jason@lakedaemon.net>,
	Pawel Moll <Pawel.Moll@arm.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Will Deacon <Will.Deacon@arm.com>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"Harish.Kasiviswanathan@amd.com" <Harish.Kasiviswanathan@amd.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH 4/4 V3] irqchip: gicv2m: Add support for multiple MSI for ARM64 GICv2m
Date: Fri, 1 Aug 2014 09:36:51 -0500	[thread overview]
Message-ID: <53DBA603.9030509@amd.com> (raw)
In-Reply-To: <87vbqej2rj.fsf@approximate.cambridge.arm.com>

On 7/30/2014 10:16 AM, Marc Zyngier wrote:
> Why do we need this complexity at all? Is there any case where we'd want
> to limit ourselves to a single vector for MSI?

I think the ARM64 GICv2m should not be the limitation for the devices 
multiple MSI if there is no real hardware/design limitation.

> arm64 is a new enough architecture so that we can expect all interrupt controllers to cope
> with that.

I am not sure if I understand this comment.

We are not forcing all interrupt controllers for ARM64 to handle 
multi-MSI.  They have the option to support if multi-MSI if they want 
to. I just think that we should not put the architectural limit here.

Thanks,

Suravee


WARNING: multiple messages have this Message-ID (diff)
From: suravee.suthikulpanit@amd.com (Suravee Suthikulanit)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/4 V3] irqchip: gicv2m: Add support for multiple MSI for ARM64 GICv2m
Date: Fri, 1 Aug 2014 09:36:51 -0500	[thread overview]
Message-ID: <53DBA603.9030509@amd.com> (raw)
In-Reply-To: <87vbqej2rj.fsf@approximate.cambridge.arm.com>

On 7/30/2014 10:16 AM, Marc Zyngier wrote:
> Why do we need this complexity at all? Is there any case where we'd want
> to limit ourselves to a single vector for MSI?

I think the ARM64 GICv2m should not be the limitation for the devices 
multiple MSI if there is no real hardware/design limitation.

> arm64 is a new enough architecture so that we can expect all interrupt controllers to cope
> with that.

I am not sure if I understand this comment.

We are not forcing all interrupt controllers for ARM64 to handle 
multi-MSI.  They have the option to support if multi-MSI if they want 
to. I just think that we should not put the architectural limit here.

Thanks,

Suravee

  reply	other threads:[~2014-08-01 14:37 UTC|newest]

Thread overview: 89+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-09 23:05 [PATCH 0/4 V3] irqchip: gic: Introduce ARM GICv2m MSI(-X) support suravee.suthikulpanit
2014-07-09 23:05 ` suravee.suthikulpanit
2014-07-09 23:05 ` suravee.suthikulpanit at amd.com
2014-07-09 23:05 ` [PATCH 1/4 V3] irqchip: gic: Add binding probe for ARM GIC400 suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit at amd.com
2014-07-14 14:03   ` Heiko Stübner
2014-07-14 14:03     ` Heiko Stübner
2014-07-14 22:03     ` [PATCH] " Heiko Stübner
2014-07-14 22:03       ` Heiko Stübner
2014-07-15  8:01       ` Will Deacon
2014-07-15  8:01         ` Will Deacon
2014-07-17 12:48       ` Jason Cooper
2014-07-17 12:48         ` Jason Cooper
2014-07-17 14:13         ` Suravee Suthikulanit
2014-07-17 14:13           ` Suravee Suthikulanit
2014-07-17 14:13           ` Suravee Suthikulanit
2014-07-17 13:31       ` Mark Rutland
2014-07-17 13:31         ` Mark Rutland
2014-07-09 23:05 ` [PATCH 2/4 V3] irqchip: gic: Restructuring ARM GIC code suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit at amd.com
2014-07-17 13:12   ` Jason Cooper
2014-07-17 13:12     ` Jason Cooper
2014-07-09 23:05 ` [PATCH 3/4 V3] irqchip: gic: Add supports for ARM GICv2m MSI(-X) suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit at amd.com
2014-07-13 23:01   ` Jason Cooper
2014-07-13 23:01     ` Jason Cooper
2014-07-17 13:13   ` Jason Cooper
2014-07-17 13:13     ` Jason Cooper
2014-07-17 13:17   ` Mark Rutland
2014-07-17 13:17     ` Mark Rutland
2014-07-30 14:57   ` Marc Zyngier
2014-07-30 14:57     ` Marc Zyngier
2014-07-30 14:57     ` Marc Zyngier
2014-08-01 15:42     ` Suravee Suthikulanit
2014-08-01 15:42       ` Suravee Suthikulanit
2014-08-01 15:42       ` Suravee Suthikulanit
2014-08-01 16:05       ` Marc Zyngier
2014-08-01 16:05         ` Marc Zyngier
2014-08-01 16:05         ` Marc Zyngier
2014-08-01 16:29       ` Suravee Suthikulanit
2014-08-01 16:29         ` Suravee Suthikulanit
2014-08-01 17:05         ` Marc Zyngier
2014-08-01 17:05           ` Marc Zyngier
2014-08-01 17:05           ` Marc Zyngier
2014-08-18  0:41   ` Rob Herring
2014-08-18  0:41     ` Rob Herring
2014-07-09 23:05 ` [PATCH 4/4 V3] irqchip: gicv2m: Add support for multiple MSI for ARM64 GICv2m suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit
2014-07-09 23:05   ` suravee.suthikulpanit at amd.com
2014-07-13 23:03   ` Jason Cooper
2014-07-13 23:03     ` Jason Cooper
2014-07-17 12:53   ` Jason Cooper
2014-07-17 12:53     ` Jason Cooper
2014-07-30 15:16   ` Marc Zyngier
2014-07-30 15:16     ` Marc Zyngier
2014-07-30 15:16     ` Marc Zyngier
2014-08-01 14:36     ` Suravee Suthikulanit [this message]
2014-08-01 14:36       ` Suravee Suthikulanit
2014-08-01 14:51       ` Marc Zyngier
2014-08-01 14:51         ` Marc Zyngier
2014-08-01 16:19         ` Suravee Suthikulanit
2014-08-01 16:19           ` Suravee Suthikulanit
2014-07-13 23:14 ` [PATCH 0/4 V3] irqchip: gic: Introduce ARM GICv2m MSI(-X) support Jason Cooper
2014-07-13 23:14   ` Jason Cooper
2014-07-14 15:59   ` Suravee Suthikulanit
2014-07-14 15:59     ` Suravee Suthikulanit
2014-07-14 15:59     ` Suravee Suthikulanit
2014-07-17 12:51     ` Jason Cooper
2014-07-17 12:51       ` Jason Cooper
2014-07-17 13:18 ` Jason Cooper
2014-07-17 13:18   ` Jason Cooper
2014-07-17 13:55   ` Mark Rutland
2014-07-17 13:55     ` Mark Rutland
2014-07-17 14:12     ` Jason Cooper
2014-07-17 14:12       ` Jason Cooper
2014-07-18  9:02       ` Mark Rutland
2014-07-18  9:02         ` Mark Rutland
2014-07-18 12:31         ` Jason Cooper
2014-07-18 12:31           ` Jason Cooper
2014-07-18 12:40           ` Mark Rutland
2014-07-18 12:40             ` Mark Rutland
2014-07-17 14:48     ` Suravee Suthikulanit
2014-07-17 14:48       ` Suravee Suthikulanit
2014-07-17 14:48       ` Suravee Suthikulanit
2014-07-18  9:04       ` Mark Rutland
2014-07-18  9:04         ` Mark Rutland

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