[PATCH 0/2] drm/mipi-dsi: support low power transmission

[PATCH 0/2] drm/mipi-dsi: support low power transmission

[Inki Dae]

This patch considers low power transmisson to two clock behaviors,
non-continuous and continuous clock mode.

These two clock behaviors can transmit data in high speed or low power.
So this patch series adds a new flag, MIPI_DSI_MODE_LPM so that each
host driver can setup its host controller properly.

Patch 1:
Add MIPI_DSI_MODE_LPM flag. If panel driver sets this flag, then msg->flags
will have MIPI_DSI_MSG_USE_LPM so that host driver can transmit data in low
power.

Patch 2:
Just exynos part for supporting non-continuous and continuous clock mode.

Inki Dae (2):
  drm/mipi-dsi: consider low power transmission
  drm/exynos: mipi-dsi: consider non-continuous clock mode

 drivers/gpu/drm/drm_mipi_dsi.c          |    6 ++++++
 drivers/gpu/drm/exynos/exynos_drm_dsi.c |   19 +++++++++++++++++++
 include/drm/drm_mipi_dsi.h              |    2 ++
 3 files changed, 27 insertions(+)

-- 
1.7.9.5

[PATCH 1/2] drm/mipi-dsi: consider low power transmission

[Inki Dae]

This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data
in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM
so that host driver of each SoC can clear or set relevant register
bit for low power transmission.

All host drivers shall support continuous clock behavior on the
Clock Lane, and optionally may support non-continuous clock behavior.
Both of them can transmit data in high speed of low power.

With each clock behavior, non-continuous or continuous clock mode,
host controller will transmit data in high speed by default so if
peripheral wants to receive data in low power, the peripheral driver
should set MIPI_DSI_MODE_LPM flag.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/drm_mipi_dsi.c |    6 ++++++
 include/drm/drm_mipi_dsi.h     |    2 ++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
index 6aa6a9e..eb6dfe5 100644
--- a/drivers/gpu/drm/drm_mipi_dsi.c
+++ b/drivers/gpu/drm/drm_mipi_dsi.c
@@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
 		break;
 	}
 
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+		msg.flags = MIPI_DSI_MSG_USE_LPM;
+
 	return ops->transfer(dsi->host, &msg);
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_write);
@@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
 	if (!ops || !ops->transfer)
 		return -ENOSYS;
 
+	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
+		msg.flags = MIPI_DSI_MSG_USE_LPM;
+
 	return ops->transfer(dsi->host, &msg);
 }
 EXPORT_SYMBOL(mipi_dsi_dcs_read);
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 2bb55b8..8569dc5 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
 #define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
 /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
 #define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM		BIT(11)
 
 enum mipi_dsi_pixel_format {
 	MIPI_DSI_FMT_RGB888,
-- 
1.7.9.5

Re: [PATCH 1/2] drm/mipi-dsi: consider low power transmission

[Andrzej Hajda]

On 08/18/2014 10:11 AM, Inki Dae wrote:
> This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data
> in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM
> so that host driver of each SoC can clear or set relevant register
> bit for low power transmission.
>
> All host drivers shall support continuous clock behavior on the
> Clock Lane, and optionally may support non-continuous clock behavior.
> Both of them can transmit data in high speed of low power.
>
> With each clock behavior, non-continuous or continuous clock mode,
> host controller will transmit data in high speed by default so if
> peripheral wants to receive data in low power, the peripheral driver
> should set MIPI_DSI_MODE_LPM flag.

I think it would be better to remove last two paragraphs as irrelevant,
LPM and clock behavior are orthogonal.

>
> Signed-off-by: Inki Dae <inki.dae@samsung.com>
> ---
>  drivers/gpu/drm/drm_mipi_dsi.c |    6 ++++++
>  include/drm/drm_mipi_dsi.h     |    2 ++
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
> index 6aa6a9e..eb6dfe5 100644
> --- a/drivers/gpu/drm/drm_mipi_dsi.c
> +++ b/drivers/gpu/drm/drm_mipi_dsi.c
> @@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
>  		break;
>  	}
>  
> +	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
> +		msg.flags = MIPI_DSI_MSG_USE_LPM;
> +
>  	return ops->transfer(dsi->host, &msg);
>  }
>  EXPORT_SYMBOL(mipi_dsi_dcs_write);
> @@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
>  	if (!ops || !ops->transfer)
>  		return -ENOSYS;
>  
> +	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
> +		msg.flags = MIPI_DSI_MSG_USE_LPM;
> +

I see three other ways of adding LPM to DCS:

1. Add flags argument to DCS command, eg:
   mipi_dsi_dcs_write(dsi, data, len, flags)

2. Pass struct mipi_dsi_device to transfer callback:
    ssize_t (*transfer)(struct mipi_dsi_device *dsi,
                struct mipi_dsi_msg *msg);
   or
    ssize_t (*transfer)(struct mipi_dsi_host *host,
        struct mipi_dsi_device *dsi,
        struct mipi_dsi_msg *msg);

    This way DSI host will have access to mipi_dsi_device
    and to its flags.

3. Create new API function, lets call it dsi_transfer, which
    should by called by DCS helpers instead of transfer op.
    This function shall translate device flags to message flags
    and call the original op.

I think the 3rd solution is the best one, but I have no strong feelings
against the other ones, including your.
As I remember Thierry have also some ideas about changes in DSI API
so I have added him to CC.

Regards
Andrzej


>  	return ops->transfer(dsi->host, &msg);
>  }
>  EXPORT_SYMBOL(mipi_dsi_dcs_read);
> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
> index 2bb55b8..8569dc5 100644
> --- a/include/drm/drm_mipi_dsi.h
> +++ b/include/drm/drm_mipi_dsi.h
> @@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
>  #define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
>  /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
>  #define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
> +/* transmit data in low power */
> +#define MIPI_DSI_MODE_LPM		BIT(11)
>  
>  enum mipi_dsi_pixel_format {
>  	MIPI_DSI_FMT_RGB888,

Re: [PATCH 1/2] drm/mipi-dsi: consider low power transmission

[Inki Dae]

On 2014년 08월 18일 20:38, Andrzej Hajda wrote:
> On 08/18/2014 10:11 AM, Inki Dae wrote:
>> This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data
>> in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM
>> so that host driver of each SoC can clear or set relevant register
>> bit for low power transmission.
>>
>> All host drivers shall support continuous clock behavior on the
>> Clock Lane, and optionally may support non-continuous clock behavior.
>> Both of them can transmit data in high speed of low power.
>>
>> With each clock behavior, non-continuous or continuous clock mode,
>> host controller will transmit data in high speed by default so if
>> peripheral wants to receive data in low power, the peripheral driver
>> should set MIPI_DSI_MODE_LPM flag.
> 
> I think it would be better to remove last two paragraphs as irrelevant,
> LPM and clock behavior are orthogonal.
> 
>>
>> Signed-off-by: Inki Dae <inki.dae@samsung.com>
>> ---
>>  drivers/gpu/drm/drm_mipi_dsi.c |    6 ++++++
>>  include/drm/drm_mipi_dsi.h     |    2 ++
>>  2 files changed, 8 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c
>> index 6aa6a9e..eb6dfe5 100644
>> --- a/drivers/gpu/drm/drm_mipi_dsi.c
>> +++ b/drivers/gpu/drm/drm_mipi_dsi.c
>> @@ -231,6 +231,9 @@ ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, const void *data,
>>  		break;
>>  	}
>>  
>> +	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
>> +		msg.flags = MIPI_DSI_MSG_USE_LPM;
>> +
>>  	return ops->transfer(dsi->host, &msg);
>>  }
>>  EXPORT_SYMBOL(mipi_dsi_dcs_write);
>> @@ -260,6 +263,9 @@ ssize_t mipi_dsi_dcs_read(struct mipi_dsi_device *dsi, u8 cmd, void *data,
>>  	if (!ops || !ops->transfer)
>>  		return -ENOSYS;
>>  
>> +	if (dsi->mode_flags & MIPI_DSI_MODE_LPM)
>> +		msg.flags = MIPI_DSI_MSG_USE_LPM;
>> +
> 
> I see three other ways of adding LPM to DCS:
> 
> 1. Add flags argument to DCS command, eg:
>    mipi_dsi_dcs_write(dsi, data, len, flags)
> 
> 2. Pass struct mipi_dsi_device to transfer callback:
>     ssize_t (*transfer)(struct mipi_dsi_device *dsi,
>                 struct mipi_dsi_msg *msg);
>    or
>     ssize_t (*transfer)(struct mipi_dsi_host *host,
>         struct mipi_dsi_device *dsi,
>         struct mipi_dsi_msg *msg);
> 
>     This way DSI host will have access to mipi_dsi_device
>     and to its flags.
> 
> 3. Create new API function, lets call it dsi_transfer, which
>     should by called by DCS helpers instead of transfer op.
>     This function shall translate device flags to message flags
>     and call the original op.
> 
> I think the 3rd solution is the best one, but I have no strong feelings
> against the other ones, including your.
> As I remember Thierry have also some ideas about changes in DSI API
> so I have added him to CC.

Thanks for comments and CCing Thierry.

I think it'd better to handle this solution flexibly. There was a
concern that my solution makes all commands to be transmitted in low
power or high speed by default. So if we have other solution which
passes a flag per a message, then we could transmit each command in low
power or high speed, which could also be used selectively with my
solution - if msg->flags has MIPI_DSI_MODE_LPM, then each flag of the
new API is ignored.

Thierry, which one do you prefer? Otherwise, do you have other opinions?

Thanks,
Inki Dae

> 
> Regards
> Andrzej
> 
> 
>>  	return ops->transfer(dsi->host, &msg);
>>  }
>>  EXPORT_SYMBOL(mipi_dsi_dcs_read);
>> diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
>> index 2bb55b8..8569dc5 100644
>> --- a/include/drm/drm_mipi_dsi.h
>> +++ b/include/drm/drm_mipi_dsi.h
>> @@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
>>  #define MIPI_DSI_MODE_EOT_PACKET	BIT(9)
>>  /* device supports non-continuous clock behavior (DSI spec 5.6.1) */
>>  #define MIPI_DSI_CLOCK_NON_CONTINUOUS	BIT(10)
>> +/* transmit data in low power */
>> +#define MIPI_DSI_MODE_LPM		BIT(11)
>>  
>>  enum mipi_dsi_pixel_format {
>>  	MIPI_DSI_FMT_RGB888,
> 
> 

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Re: [PATCH 1/2] drm/mipi-dsi: consider low power transmission

[Linus Walleij]

On Mon, Aug 18, 2014 at 10:11 AM Inki Dae <inki.dae@samsung.com> wrote:

> This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data
> in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM
> so that host driver of each SoC can clear or set relevant register
> bit for low power transmission.
>
> All host drivers shall support continuous clock behavior on the
> Clock Lane, and optionally may support non-continuous clock behavior.
> Both of them can transmit data in high speed of low power.
>
> With each clock behavior, non-continuous or continuous clock mode,
> host controller will transmit data in high speed by default so if
> peripheral wants to receive data in low power, the peripheral driver
> should set MIPI_DSI_MODE_LPM flag.
>
> Signed-off-by: Inki Dae <inki.dae@samsung.com>

Hi Inki Dae,

I recently used this flag in a driver to the effect that all writes become
LPM, including updates to a command mode-only panel, so the pixels
will draw very slowly on the screen. In this case I added the
feature for debugging (my display works fine in LP but not yet
in HS mode).

This is not a problem with a video mode panel since these are by
the specification required to operate in HS mode, so we know they
are always HS.

But in command mode, all commands are equal, even if they are
screen updates. I program my hardware to update the display
with a stream of commands, and with this flag set, that stream
will go slow.

Is this how it is intended?

Using the flag like this is kind of interesting because it is good for
debugging but I don't know if this is how it was intended.

If the flag is only supposed to be for DCS write commands, so that
both write and read happen in LP mode, then we
should probably rename it accordingly I think?

Yours,
Linus Walleij
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[PATCH 2/2] drm/exynos: mipi-dsi: consider non-continuous clock mode

[Inki Dae]

This patch adds non-continuous clock mode support

Clock mode on Clock Lane is continuous clock by default.
So if we want to transmit data in non-continuous clock mode
to reduce power consumption, then host driver should set
DSIM_CLKLANE_STOP bit. In this case, host controller turns off
HS clock between high speed transmissions.

For this, this patch adds a new bit, DSIM_CLKLANE_STOP, and makes
the host driver set this bit only in case that dsi->mode_flags has
MIPI_DSI_CLOCK_NON_CONTINUOUS flag.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c |   19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 442aa2d..2d47290 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -114,6 +114,8 @@
 #define DSIM_SYNC_INFORM		(1 << 27)
 #define DSIM_EOT_DISABLE		(1 << 28)
 #define DSIM_MFLUSH_VS			(1 << 29)
+/* This flag is valid only for exynos3250/3472/4415/5260/5430 */
+#define DSIM_CLKLANE_STOP		(1 << 30)
 
 /* DSIM_ESCMODE */
 #define DSIM_TX_TRIGGER_RST		(1 << 4)
@@ -262,6 +264,7 @@ struct exynos_dsi_driver_data {
 	unsigned int plltmr_reg;
 
 	unsigned int has_freqband:1;
+	unsigned int has_clklane_stop:1;
 };
 
 struct exynos_dsi {
@@ -304,6 +307,7 @@ struct exynos_dsi {
 static struct exynos_dsi_driver_data exynos4_dsi_driver_data = {
 	.plltmr_reg = 0x50,
 	.has_freqband = 1,
+	.has_clklane_stop = 1,
 };
 
 static struct exynos_dsi_driver_data exynos5_dsi_driver_data = {
@@ -569,6 +573,7 @@ static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)
 
 static int exynos_dsi_init_link(struct exynos_dsi *dsi)
 {
+	struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
 	int timeout;
 	u32 reg;
 	u32 lanes_mask;
@@ -650,6 +655,20 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi)
 	reg |= DSIM_LANE_EN(lanes_mask);
 	writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
 
+	/*
+	 * Use non-continuous clock mode if the periparal wants and
+	 * host controller supports
+	 *
+	 * In non-continous clock mode, host controller will turn off
+	 * the HS clock between high-speed transmissions to reduce
+	 * power consumption.
+	 */
+	if (driver_data->has_clklane_stop &&
+			dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+		reg |= DSIM_CLKLANE_STOP;
+		writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
+	}
+
 	/* Check clock and data lane state are stop state */
 	timeout = 100;
 	do {
-- 
1.7.9.5

Re: [PATCH 2/2] drm/exynos: mipi-dsi: consider non-continuous clock mode

[Andrzej Hajda]

On 08/18/2014 10:11 AM, Inki Dae wrote:
> This patch adds non-continuous clock mode support
>
> Clock mode on Clock Lane is continuous clock by default.
> So if we want to transmit data in non-continuous clock mode
> to reduce power consumption, then host driver should set
> DSIM_CLKLANE_STOP bit. In this case, host controller turns off
> HS clock between high speed transmissions.
>
> For this, this patch adds a new bit, DSIM_CLKLANE_STOP, and makes
> the host driver set this bit only in case that dsi->mode_flags has
> MIPI_DSI_CLOCK_NON_CONTINUOUS flag.
>
> Signed-off-by: Inki Dae <inki.dae@samsung.com>

Acked-by: Andrzej Hajda <a.hajda@samsung.com>
--
Regards
Andrzej
> ---
>  drivers/gpu/drm/exynos/exynos_drm_dsi.c |   19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> index 442aa2d..2d47290 100644
> --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
> @@ -114,6 +114,8 @@
>  #define DSIM_SYNC_INFORM		(1 << 27)
>  #define DSIM_EOT_DISABLE		(1 << 28)
>  #define DSIM_MFLUSH_VS			(1 << 29)
> +/* This flag is valid only for exynos3250/3472/4415/5260/5430 */
> +#define DSIM_CLKLANE_STOP		(1 << 30)
>  
>  /* DSIM_ESCMODE */
>  #define DSIM_TX_TRIGGER_RST		(1 << 4)
> @@ -262,6 +264,7 @@ struct exynos_dsi_driver_data {
>  	unsigned int plltmr_reg;
>  
>  	unsigned int has_freqband:1;
> +	unsigned int has_clklane_stop:1;
>  };
>  
>  struct exynos_dsi {
> @@ -304,6 +307,7 @@ struct exynos_dsi {
>  static struct exynos_dsi_driver_data exynos4_dsi_driver_data = {
>  	.plltmr_reg = 0x50,
>  	.has_freqband = 1,
> +	.has_clklane_stop = 1,
>  };
>  
>  static struct exynos_dsi_driver_data exynos5_dsi_driver_data = {
> @@ -569,6 +573,7 @@ static void exynos_dsi_disable_clock(struct exynos_dsi *dsi)
>  
>  static int exynos_dsi_init_link(struct exynos_dsi *dsi)
>  {
> +	struct exynos_dsi_driver_data *driver_data = dsi->driver_data;
>  	int timeout;
>  	u32 reg;
>  	u32 lanes_mask;
> @@ -650,6 +655,20 @@ static int exynos_dsi_init_link(struct exynos_dsi *dsi)
>  	reg |= DSIM_LANE_EN(lanes_mask);
>  	writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
>  
> +	/*
> +	 * Use non-continuous clock mode if the periparal wants and
> +	 * host controller supports
> +	 *
> +	 * In non-continous clock mode, host controller will turn off
> +	 * the HS clock between high-speed transmissions to reduce
> +	 * power consumption.
> +	 */
> +	if (driver_data->has_clklane_stop &&
> +			dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
> +		reg |= DSIM_CLKLANE_STOP;
> +		writel(reg, dsi->reg_base + DSIM_CONFIG_REG);
> +	}
> +
>  	/* Check clock and data lane state are stop state */
>  	timeout = 100;
>  	do {

[PATCH 0/2] drm/mipi-dsi: consider low power transmission

[Inki Dae]

This patch considers low power transmisson to two clock behaviors,
non-continuous and continuous clock mode.

These two clock behaviors can transmit data in high speed or low power.
So this patch series adds a new flag, MIPI_DSI_MODE_LPM so that each
host driver can setup its host controller properly.

Patch 1:
Add MIPI_DSI_MODE_LPM flag, and with this flag, mipi-dsi framework will set
MIPI_DSI_MSG_USE_LPM.

Patch 2:
Just exynos part for supporting non-continuous and continuous clock mode.

Inki Dae (2):
  drm/mipi-dsi: consider low power transmission.
  drm/exynos: mipi-dsi: consider non-continuous clock mode

 drivers/gpu/drm/drm_mipi_dsi.c          |    6 ++++++
 drivers/gpu/drm/exynos/exynos_drm_dsi.c |   32 +++++++++++++++++++++++++++++--
 include/drm/drm_mipi_dsi.h              |    2 ++
 3 files changed, 38 insertions(+), 2 deletions(-)

-- 
1.7.9.5

[PATCH 2/2] drm/exynos: mipi-dsi: consider non-continuous clock mode

[Inki Dae]

This patch adds non-continuous clock mode support.

Clock mode on Clock Lane is continuous clock by default.
So if we want to transmit data in non-continuous clock mode
to reduce power consumption, then host driver should clear
DSIM_TX_REQUEST_HSCLK.

For this, this patch makes the host driver set DSIM_TX_REQUEST_HSCLK
only in case that dsi->mode_flags has no MIPI_DSI_CLOCK_NON_CONTINUOUS
flag.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_drm_dsi.c |   32 +++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
index 86aebd8..8c43c96 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c
@@ -493,8 +493,17 @@ static int exynos_dsi_enable_clock(struct exynos_dsi *dsi)
 			| DSIM_ESC_PRESCALER(esc_div)
 			| DSIM_LANE_ESC_CLK_EN_CLK
 			| DSIM_LANE_ESC_CLK_EN_DATA(BIT(dsi->lanes) - 1)
-			| DSIM_BYTE_CLK_SRC(0)
-			| DSIM_TX_REQUEST_HSCLK;
+			| DSIM_BYTE_CLK_SRC(0);
+
+	/*
+	 * Set DSIM_TX_REQUEST_HSCLK only in case of not requesting
+	 * non-continous clock mode. So if MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	 * then host controller will turn off the HS clock between high-speed
+	 * transmissions.
+	 */
+	if (!(dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS))
+		reg |= DSIM_TX_REQUEST_HSCLK;
+
 	writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
 
 	return 0;
@@ -701,10 +710,29 @@ static void exynos_dsi_set_display_mode(struct exynos_dsi *dsi)
 	dev_dbg(dsi->dev, "LCD size = %dx%d\n", vm->hactive, vm->vactive);
 }
 
+static void exynos_dsi_enable_hs_clock(struct exynos_dsi *dsi,
+					bool enable)
+{
+	u32 reg = readl(dsi->reg_base + DSIM_CLKCTRL_REG);
+
+	reg &= ~DSIM_TX_REQUEST_HSCLK;
+	if (enable)
+		reg |= DSIM_TX_REQUEST_HSCLK;
+
+	writel(reg, dsi->reg_base + DSIM_CLKCTRL_REG);
+}
+
 static void exynos_dsi_set_display_enable(struct exynos_dsi *dsi, bool enable)
 {
 	u32 reg;
 
+	/*
+	 * Set DSIM_TX_REQUEST_HSCLK. In case of video data, host controller
+	 * will transmit the data in HS mode always.
+	 */
+	if (enable)
+		exynos_dsi_enable_hs_clock(dsi, true);
+
 	reg = readl(dsi->reg_base + DSIM_MDRESOL_REG);
 	if (enable)
 		reg |= DSIM_MAIN_STAND_BY;
-- 
1.7.9.5