From: Hanjun Guo <hanjun.guo@linaro.org>
To: Sudeep Holla <sudeep.holla@arm.com>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Mark Rutland <Mark.Rutland@arm.com>
Cc: "graeme.gregory@linaro.org" <graeme.gregory@linaro.org>,
Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
"grant.likely@linaro.org" <grant.likely@linaro.org>,
Will Deacon <Will.Deacon@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <Marc.Zyngier@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Robert Richter <rric@kernel.org>, Lv Zheng <lv.zheng@intel.com>,
Robert Moore <robert.moore@intel.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Liviu Dudau <Liviu.Dudau@arm.com>,
Randy Dunlap <rdunlap@infradead.org>,
Charles Garcia-Tobin <Charles.Garcia-Tobin@arm.com>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>"linux-kernel@vger.kernel.org"
<l>
Subject: Re: [PATCH v2 06/18] ARM64 / ACPI: Parse MADT to map logical cpu to MPIDR and get cpu_possible/present_map
Date: Tue, 19 Aug 2014 19:00:12 +0800 [thread overview]
Message-ID: <53F32E3C.1070102@linaro.org> (raw)
In-Reply-To: <53F24705.7080809@arm.com>
Hi Sudeep,
On 2014-8-19 2:33, Sudeep Holla wrote:
> On 04/08/14 16:28, Hanjun Guo wrote:
>> MADT contains the information for MPIDR which is essential for
>> SMP initialization, parse the GIC cpu interface structures to
>> get the MPIDR value and map it to cpu_logical_map(), and add
>> enabled cpu with valid MPIDR into cpu_possible_map and
>> cpu_present_map.
>>
>> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> ---
>> arch/arm64/include/asm/acpi.h | 2 +
>> arch/arm64/kernel/acpi.c | 129 ++++++++++++++++++++++++++++++++++++++++-
>> arch/arm64/kernel/smp.c | 10 +++-
>> 3 files changed, 138 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>> index 6e04868..e877967 100644
>> --- a/arch/arm64/include/asm/acpi.h
>> +++ b/arch/arm64/include/asm/acpi.h
>> @@ -64,6 +64,8 @@ static inline void arch_fix_phys_package_id(int num, u32
>> slot) { }
>> extern int (*acpi_suspend_lowlevel)(void);
>> #define acpi_wakeup_address 0
>>
>> +#define MAX_GIC_CPU_INTERFACE 65535
>> +
>
> Did you get this information from GIC specification ?
Actually not. since MAX_GIC_CPU_INTERFACE represents the maximum GIC CPU
interfaces (CPUs) entries in MADT, so I use a number big enough to represent max
CPUs in the system.
>
> IIUC you are trying to represent max number of interrupt controller
> entries MADT can possibly have. So, I had suggested to change the name
> like MAX_MADT_INTERRUPT_CONTROLLER_ENTRIES so that it is not GIC specific.
Will INTERRUPT_CONTROLLER confuse people? There is only one GIC redistributor
(some people regard it as interrupt controller) in ARM system, if we use
INTERRUPT_CONTROLLER people will regard it as multi-redistributors in the
system, I think GIC_CPU_INTERFACE would be better, what do you think?
>
>> #endif /* CONFIG_ACPI */
>>
>> #endif /*_ASM_ACPI_H*/
>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>> index 69a315d..9e07d99 100644
>> --- a/arch/arm64/kernel/acpi.c
>> +++ b/arch/arm64/kernel/acpi.c
>> @@ -22,6 +22,9 @@
>> #include <linux/bootmem.h>
>> #include <linux/smp.h>
>>
>> +#include <asm/smp_plat.h>
>> +#include <asm/cputype.h>
>> +
>> int acpi_noirq; /* skip ACPI IRQ initialization */
>> int acpi_disabled;
>> EXPORT_SYMBOL(acpi_disabled);
>> @@ -29,6 +32,8 @@ EXPORT_SYMBOL(acpi_disabled);
>> int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
>> EXPORT_SYMBOL(acpi_pci_disabled);
>>
>> +static int enabled_cpus; /* Processors (GICC) with enabled flag in MADT */
>> +
>> /*
>> * __acpi_map_table() will be called before page_init(), so early_ioremap()
>> * or early_memremap() should be called here to for ACPI table mapping.
>> @@ -49,6 +54,122 @@ void __init __acpi_unmap_table(char *map, unsigned long size)
>> early_memunmap(map, size);
>> }
>>
>> +/**
>> + * acpi_register_gic_cpu_interface - register a gic cpu interface and
>> + * generates a logical cpu number
>> + * @mpidr: CPU's hardware id to register, MPIDR represented in MADT
>> + * @enabled: this cpu is enabled or not
>> + *
>> + * Returns the logical cpu number which maps to the gic cpu interface
>> + */
>> +static int acpi_register_gic_cpu_interface(u64 mpidr, u8 enabled)
>> +{
>
> IMO the function name gives me a wrong idea that you are registering
> something with GIC. How about acpi_map_gic_cpu_interface ?
Great, acpi_map_gic_cpu_interface is better.
>
>> + int cpu;
>> +
>> + if (mpidr == INVALID_HWID) {
>> + pr_info("Skip invalid cpu hardware ID\n");
>> + return -EINVAL;
>> + }
>> +
>> + total_cpus++;
>> + if (!enabled)
>> + return -EINVAL;
>> +
>> + if (enabled_cpus >= NR_CPUS) {
>> + pr_warn("NR_CPUS limit of %d reached, Processor %d/0x%llx ignored.\n",
>> + NR_CPUS, total_cpus, mpidr);
>> + return -EINVAL;
>> + }
>> +
>> + /* If it is the first CPU, no need to check duplicate MPIDRs */
>> + if (!enabled_cpus)
>> + goto skip_mpidr_check;
>> +
>> + /*
>> + * Duplicate MPIDRs are a recipe for disaster. Scan
>> + * all initialized entries and check for
>> + * duplicates. If any is found just ignore the CPU.
>> + */
>> + for_each_present_cpu(cpu) {
>> + if (cpu_logical_map(cpu) == mpidr) {
>> + pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",
>> + mpidr);
>> + return -EINVAL;
>> + }
>> + }
>> +
>> +skip_mpidr_check:
>> + enabled_cpus++;
>> +
>> + /* allocate a logical cpu id for the new comer */
>> + if (cpu_logical_map(0) == mpidr) {
>> + /*
>> + * boot_cpu_init() already hold bit 0 in cpu_present_mask
>> + * for BSP, no need to allocate again.
>> + */
>> + cpu = 0;
>> + } else {
>> + cpu = cpumask_next_zero(-1, cpu_present_mask);
>> + }
>> +
>> + /* map the logical cpu id to cpu MPIDR */
>> + cpu_logical_map(cpu) = mpidr;
>> +
>> + set_cpu_possible(cpu, true);
>
> IMO it better to keep all these updates to cpumasks contained in the
> smp.c as I had mentioned before. I think you can refactor smp_init_cpus
> to achieve that.
Could you give me more hints? smp_init_cpus() use the CPU node in device
tree to map cpu, but in ACPI, they are table entries, if you can give me
more hints about how to refactor it, I will appreciate a lot.
>
>> + set_cpu_present(cpu, true);
>
> This is totally wrong ? What would you do if the cpu failed to
> initialize ? I don't see that handled.
>
>> +
>> + return cpu;
>> +}
>> +
>> +static int __init
>> +acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
>> + const unsigned long end)
>> +{
>> + struct acpi_madt_generic_interrupt *processor;
>> +
>> + processor = (struct acpi_madt_generic_interrupt *)header;
>> +
>> + if (BAD_MADT_ENTRY(processor, end))
>> + return -EINVAL;
>> +
>> + acpi_table_print_madt_entry(header);
>> +
>> + acpi_register_gic_cpu_interface(processor->arm_mpidr,
>> + processor->flags & ACPI_MADT_ENABLED);
>> +
>> + return 0;
>> +}
>> +
>> +/*
>> + * Parse GIC cpu interface related entries in MADT
>> + * returns 0 on success, < 0 on error
>> + */
>> +static int __init acpi_parse_madt_gic_cpu_interface_entries(void)
>> +{
>> + int count;
>> +
>> + /*
>> + * do a partial walk of MADT to determine how many CPUs
>> + * we have including disabled CPUs, and get information
>> + * we need for SMP init
>> + */
>> + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
>> + acpi_parse_gic_cpu_interface, MAX_GIC_CPU_INTERFACE);
>> +
>> + if (!count) {
>> + pr_err("No GIC CPU interface entries present\n");
>> + return -ENODEV;
>> + } else if (count < 0) {
>> + pr_err("Error parsing GIC CPU interface entry\n");
>> + return count;
>> + }
>> +
>> + /* Make boot-up look pretty */
>> + pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
>
> Ideally just setup cpu_logical_map in acpi_parse_gic_cpu_interface and
> setup cpumasks in smp_init_cpus.
>
>> +
>> + return 0;
>> +}
>> +
>> static int __init acpi_parse_fadt(struct acpi_table_header *table)
>> {
>> struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
>> @@ -99,8 +220,12 @@ int __init acpi_boot_init(void)
>> return -ENODEV;
>>
>> err = acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
>> - if (err)
>> - pr_err("Can't find FADT\n");
>> + if (err) {
>> + pr_err("Can't find FADT or error happened during parsing FADT\n");
>> + return err;
>> + }
>> +
>> + err = acpi_parse_madt_gic_cpu_interface_entries();
>>
>> return err;
>> }
>> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
>> index 40f38f4..8f1d37c 100644
>> --- a/arch/arm64/kernel/smp.c
>> +++ b/arch/arm64/kernel/smp.c
>> @@ -36,6 +36,7 @@
>> #include <linux/completion.h>
>> #include <linux/of.h>
>> #include <linux/irq_work.h>
>> +#include <linux/acpi.h>
>>
>> #include <asm/atomic.h>
>> #include <asm/cacheflush.h>
>> @@ -458,7 +459,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
>> if (err)
>> continue;
>>
>> - set_cpu_present(cpu, true);
>> + /*
>> + * In ACPI mode, cpu_present_map was initialised when
>> + * MADT table was parsed which before this function
>> + * is called.
>> + */
>> + if (acpi_disabled)
>> + set_cpu_present(cpu, true);
>> +
>
> This is the right place to set the cpu present based on the return value
> of cpu_prepare.
Yes, as I replied in previous email, I will update the patch and consider
CPU hotplug in the future.
Thanks
Hanjun
WARNING: multiple messages have this Message-ID (diff)
From: hanjun.guo@linaro.org (Hanjun Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 06/18] ARM64 / ACPI: Parse MADT to map logical cpu to MPIDR and get cpu_possible/present_map
Date: Tue, 19 Aug 2014 19:00:12 +0800 [thread overview]
Message-ID: <53F32E3C.1070102@linaro.org> (raw)
In-Reply-To: <53F24705.7080809@arm.com>
Hi Sudeep,
On 2014-8-19 2:33, Sudeep Holla wrote:
> On 04/08/14 16:28, Hanjun Guo wrote:
>> MADT contains the information for MPIDR which is essential for
>> SMP initialization, parse the GIC cpu interface structures to
>> get the MPIDR value and map it to cpu_logical_map(), and add
>> enabled cpu with valid MPIDR into cpu_possible_map and
>> cpu_present_map.
>>
>> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> ---
>> arch/arm64/include/asm/acpi.h | 2 +
>> arch/arm64/kernel/acpi.c | 129 ++++++++++++++++++++++++++++++++++++++++-
>> arch/arm64/kernel/smp.c | 10 +++-
>> 3 files changed, 138 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>> index 6e04868..e877967 100644
>> --- a/arch/arm64/include/asm/acpi.h
>> +++ b/arch/arm64/include/asm/acpi.h
>> @@ -64,6 +64,8 @@ static inline void arch_fix_phys_package_id(int num, u32
>> slot) { }
>> extern int (*acpi_suspend_lowlevel)(void);
>> #define acpi_wakeup_address 0
>>
>> +#define MAX_GIC_CPU_INTERFACE 65535
>> +
>
> Did you get this information from GIC specification ?
Actually not. since MAX_GIC_CPU_INTERFACE represents the maximum GIC CPU
interfaces (CPUs) entries in MADT, so I use a number big enough to represent max
CPUs in the system.
>
> IIUC you are trying to represent max number of interrupt controller
> entries MADT can possibly have. So, I had suggested to change the name
> like MAX_MADT_INTERRUPT_CONTROLLER_ENTRIES so that it is not GIC specific.
Will INTERRUPT_CONTROLLER confuse people? There is only one GIC redistributor
(some people regard it as interrupt controller) in ARM system, if we use
INTERRUPT_CONTROLLER people will regard it as multi-redistributors in the
system, I think GIC_CPU_INTERFACE would be better, what do you think?
>
>> #endif /* CONFIG_ACPI */
>>
>> #endif /*_ASM_ACPI_H*/
>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>> index 69a315d..9e07d99 100644
>> --- a/arch/arm64/kernel/acpi.c
>> +++ b/arch/arm64/kernel/acpi.c
>> @@ -22,6 +22,9 @@
>> #include <linux/bootmem.h>
>> #include <linux/smp.h>
>>
>> +#include <asm/smp_plat.h>
>> +#include <asm/cputype.h>
>> +
>> int acpi_noirq; /* skip ACPI IRQ initialization */
>> int acpi_disabled;
>> EXPORT_SYMBOL(acpi_disabled);
>> @@ -29,6 +32,8 @@ EXPORT_SYMBOL(acpi_disabled);
>> int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
>> EXPORT_SYMBOL(acpi_pci_disabled);
>>
>> +static int enabled_cpus; /* Processors (GICC) with enabled flag in MADT */
>> +
>> /*
>> * __acpi_map_table() will be called before page_init(), so early_ioremap()
>> * or early_memremap() should be called here to for ACPI table mapping.
>> @@ -49,6 +54,122 @@ void __init __acpi_unmap_table(char *map, unsigned long size)
>> early_memunmap(map, size);
>> }
>>
>> +/**
>> + * acpi_register_gic_cpu_interface - register a gic cpu interface and
>> + * generates a logical cpu number
>> + * @mpidr: CPU's hardware id to register, MPIDR represented in MADT
>> + * @enabled: this cpu is enabled or not
>> + *
>> + * Returns the logical cpu number which maps to the gic cpu interface
>> + */
>> +static int acpi_register_gic_cpu_interface(u64 mpidr, u8 enabled)
>> +{
>
> IMO the function name gives me a wrong idea that you are registering
> something with GIC. How about acpi_map_gic_cpu_interface ?
Great, acpi_map_gic_cpu_interface is better.
>
>> + int cpu;
>> +
>> + if (mpidr == INVALID_HWID) {
>> + pr_info("Skip invalid cpu hardware ID\n");
>> + return -EINVAL;
>> + }
>> +
>> + total_cpus++;
>> + if (!enabled)
>> + return -EINVAL;
>> +
>> + if (enabled_cpus >= NR_CPUS) {
>> + pr_warn("NR_CPUS limit of %d reached, Processor %d/0x%llx ignored.\n",
>> + NR_CPUS, total_cpus, mpidr);
>> + return -EINVAL;
>> + }
>> +
>> + /* If it is the first CPU, no need to check duplicate MPIDRs */
>> + if (!enabled_cpus)
>> + goto skip_mpidr_check;
>> +
>> + /*
>> + * Duplicate MPIDRs are a recipe for disaster. Scan
>> + * all initialized entries and check for
>> + * duplicates. If any is found just ignore the CPU.
>> + */
>> + for_each_present_cpu(cpu) {
>> + if (cpu_logical_map(cpu) == mpidr) {
>> + pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",
>> + mpidr);
>> + return -EINVAL;
>> + }
>> + }
>> +
>> +skip_mpidr_check:
>> + enabled_cpus++;
>> +
>> + /* allocate a logical cpu id for the new comer */
>> + if (cpu_logical_map(0) == mpidr) {
>> + /*
>> + * boot_cpu_init() already hold bit 0 in cpu_present_mask
>> + * for BSP, no need to allocate again.
>> + */
>> + cpu = 0;
>> + } else {
>> + cpu = cpumask_next_zero(-1, cpu_present_mask);
>> + }
>> +
>> + /* map the logical cpu id to cpu MPIDR */
>> + cpu_logical_map(cpu) = mpidr;
>> +
>> + set_cpu_possible(cpu, true);
>
> IMO it better to keep all these updates to cpumasks contained in the
> smp.c as I had mentioned before. I think you can refactor smp_init_cpus
> to achieve that.
Could you give me more hints? smp_init_cpus() use the CPU node in device
tree to map cpu, but in ACPI, they are table entries, if you can give me
more hints about how to refactor it, I will appreciate a lot.
>
>> + set_cpu_present(cpu, true);
>
> This is totally wrong ? What would you do if the cpu failed to
> initialize ? I don't see that handled.
>
>> +
>> + return cpu;
>> +}
>> +
>> +static int __init
>> +acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
>> + const unsigned long end)
>> +{
>> + struct acpi_madt_generic_interrupt *processor;
>> +
>> + processor = (struct acpi_madt_generic_interrupt *)header;
>> +
>> + if (BAD_MADT_ENTRY(processor, end))
>> + return -EINVAL;
>> +
>> + acpi_table_print_madt_entry(header);
>> +
>> + acpi_register_gic_cpu_interface(processor->arm_mpidr,
>> + processor->flags & ACPI_MADT_ENABLED);
>> +
>> + return 0;
>> +}
>> +
>> +/*
>> + * Parse GIC cpu interface related entries in MADT
>> + * returns 0 on success, < 0 on error
>> + */
>> +static int __init acpi_parse_madt_gic_cpu_interface_entries(void)
>> +{
>> + int count;
>> +
>> + /*
>> + * do a partial walk of MADT to determine how many CPUs
>> + * we have including disabled CPUs, and get information
>> + * we need for SMP init
>> + */
>> + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
>> + acpi_parse_gic_cpu_interface, MAX_GIC_CPU_INTERFACE);
>> +
>> + if (!count) {
>> + pr_err("No GIC CPU interface entries present\n");
>> + return -ENODEV;
>> + } else if (count < 0) {
>> + pr_err("Error parsing GIC CPU interface entry\n");
>> + return count;
>> + }
>> +
>> + /* Make boot-up look pretty */
>> + pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
>
> Ideally just setup cpu_logical_map in acpi_parse_gic_cpu_interface and
> setup cpumasks in smp_init_cpus.
>
>> +
>> + return 0;
>> +}
>> +
>> static int __init acpi_parse_fadt(struct acpi_table_header *table)
>> {
>> struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
>> @@ -99,8 +220,12 @@ int __init acpi_boot_init(void)
>> return -ENODEV;
>>
>> err = acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
>> - if (err)
>> - pr_err("Can't find FADT\n");
>> + if (err) {
>> + pr_err("Can't find FADT or error happened during parsing FADT\n");
>> + return err;
>> + }
>> +
>> + err = acpi_parse_madt_gic_cpu_interface_entries();
>>
>> return err;
>> }
>> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
>> index 40f38f4..8f1d37c 100644
>> --- a/arch/arm64/kernel/smp.c
>> +++ b/arch/arm64/kernel/smp.c
>> @@ -36,6 +36,7 @@
>> #include <linux/completion.h>
>> #include <linux/of.h>
>> #include <linux/irq_work.h>
>> +#include <linux/acpi.h>
>>
>> #include <asm/atomic.h>
>> #include <asm/cacheflush.h>
>> @@ -458,7 +459,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
>> if (err)
>> continue;
>>
>> - set_cpu_present(cpu, true);
>> + /*
>> + * In ACPI mode, cpu_present_map was initialised when
>> + * MADT table was parsed which before this function
>> + * is called.
>> + */
>> + if (acpi_disabled)
>> + set_cpu_present(cpu, true);
>> +
>
> This is the right place to set the cpu present based on the return value
> of cpu_prepare.
Yes, as I replied in previous email, I will update the patch and consider
CPU hotplug in the future.
Thanks
Hanjun
WARNING: multiple messages have this Message-ID (diff)
From: Hanjun Guo <hanjun.guo@linaro.org>
To: Sudeep Holla <sudeep.holla@arm.com>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Mark Rutland <Mark.Rutland@arm.com>
Cc: "graeme.gregory@linaro.org" <graeme.gregory@linaro.org>,
Arnd Bergmann <arnd@arndb.de>, Olof Johansson <olof@lixom.net>,
"grant.likely@linaro.org" <grant.likely@linaro.org>,
Will Deacon <Will.Deacon@arm.com>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <Marc.Zyngier@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Robert Richter <rric@kernel.org>, Lv Zheng <lv.zheng@intel.com>,
Robert Moore <robert.moore@intel.com>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Liviu Dudau <Liviu.Dudau@arm.com>,
Randy Dunlap <rdunlap@infradead.org>,
Charles Garcia-Tobin <Charles.Garcia-Tobin@arm.com>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linaro-acpi@lists.linaro.org" <linaro-acpi@lists.linaro.org>,
Tomasz Nowicki <tomasz.nowicki@linaro.org>
Subject: Re: [PATCH v2 06/18] ARM64 / ACPI: Parse MADT to map logical cpu to MPIDR and get cpu_possible/present_map
Date: Tue, 19 Aug 2014 19:00:12 +0800 [thread overview]
Message-ID: <53F32E3C.1070102@linaro.org> (raw)
In-Reply-To: <53F24705.7080809@arm.com>
Hi Sudeep,
On 2014-8-19 2:33, Sudeep Holla wrote:
> On 04/08/14 16:28, Hanjun Guo wrote:
>> MADT contains the information for MPIDR which is essential for
>> SMP initialization, parse the GIC cpu interface structures to
>> get the MPIDR value and map it to cpu_logical_map(), and add
>> enabled cpu with valid MPIDR into cpu_possible_map and
>> cpu_present_map.
>>
>> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
>> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org>
>> ---
>> arch/arm64/include/asm/acpi.h | 2 +
>> arch/arm64/kernel/acpi.c | 129 ++++++++++++++++++++++++++++++++++++++++-
>> arch/arm64/kernel/smp.c | 10 +++-
>> 3 files changed, 138 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
>> index 6e04868..e877967 100644
>> --- a/arch/arm64/include/asm/acpi.h
>> +++ b/arch/arm64/include/asm/acpi.h
>> @@ -64,6 +64,8 @@ static inline void arch_fix_phys_package_id(int num, u32
>> slot) { }
>> extern int (*acpi_suspend_lowlevel)(void);
>> #define acpi_wakeup_address 0
>>
>> +#define MAX_GIC_CPU_INTERFACE 65535
>> +
>
> Did you get this information from GIC specification ?
Actually not. since MAX_GIC_CPU_INTERFACE represents the maximum GIC CPU
interfaces (CPUs) entries in MADT, so I use a number big enough to represent max
CPUs in the system.
>
> IIUC you are trying to represent max number of interrupt controller
> entries MADT can possibly have. So, I had suggested to change the name
> like MAX_MADT_INTERRUPT_CONTROLLER_ENTRIES so that it is not GIC specific.
Will INTERRUPT_CONTROLLER confuse people? There is only one GIC redistributor
(some people regard it as interrupt controller) in ARM system, if we use
INTERRUPT_CONTROLLER people will regard it as multi-redistributors in the
system, I think GIC_CPU_INTERFACE would be better, what do you think?
>
>> #endif /* CONFIG_ACPI */
>>
>> #endif /*_ASM_ACPI_H*/
>> diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
>> index 69a315d..9e07d99 100644
>> --- a/arch/arm64/kernel/acpi.c
>> +++ b/arch/arm64/kernel/acpi.c
>> @@ -22,6 +22,9 @@
>> #include <linux/bootmem.h>
>> #include <linux/smp.h>
>>
>> +#include <asm/smp_plat.h>
>> +#include <asm/cputype.h>
>> +
>> int acpi_noirq; /* skip ACPI IRQ initialization */
>> int acpi_disabled;
>> EXPORT_SYMBOL(acpi_disabled);
>> @@ -29,6 +32,8 @@ EXPORT_SYMBOL(acpi_disabled);
>> int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
>> EXPORT_SYMBOL(acpi_pci_disabled);
>>
>> +static int enabled_cpus; /* Processors (GICC) with enabled flag in MADT */
>> +
>> /*
>> * __acpi_map_table() will be called before page_init(), so early_ioremap()
>> * or early_memremap() should be called here to for ACPI table mapping.
>> @@ -49,6 +54,122 @@ void __init __acpi_unmap_table(char *map, unsigned long size)
>> early_memunmap(map, size);
>> }
>>
>> +/**
>> + * acpi_register_gic_cpu_interface - register a gic cpu interface and
>> + * generates a logical cpu number
>> + * @mpidr: CPU's hardware id to register, MPIDR represented in MADT
>> + * @enabled: this cpu is enabled or not
>> + *
>> + * Returns the logical cpu number which maps to the gic cpu interface
>> + */
>> +static int acpi_register_gic_cpu_interface(u64 mpidr, u8 enabled)
>> +{
>
> IMO the function name gives me a wrong idea that you are registering
> something with GIC. How about acpi_map_gic_cpu_interface ?
Great, acpi_map_gic_cpu_interface is better.
>
>> + int cpu;
>> +
>> + if (mpidr == INVALID_HWID) {
>> + pr_info("Skip invalid cpu hardware ID\n");
>> + return -EINVAL;
>> + }
>> +
>> + total_cpus++;
>> + if (!enabled)
>> + return -EINVAL;
>> +
>> + if (enabled_cpus >= NR_CPUS) {
>> + pr_warn("NR_CPUS limit of %d reached, Processor %d/0x%llx ignored.\n",
>> + NR_CPUS, total_cpus, mpidr);
>> + return -EINVAL;
>> + }
>> +
>> + /* If it is the first CPU, no need to check duplicate MPIDRs */
>> + if (!enabled_cpus)
>> + goto skip_mpidr_check;
>> +
>> + /*
>> + * Duplicate MPIDRs are a recipe for disaster. Scan
>> + * all initialized entries and check for
>> + * duplicates. If any is found just ignore the CPU.
>> + */
>> + for_each_present_cpu(cpu) {
>> + if (cpu_logical_map(cpu) == mpidr) {
>> + pr_err("Firmware bug, duplicate CPU MPIDR: 0x%llx in MADT\n",
>> + mpidr);
>> + return -EINVAL;
>> + }
>> + }
>> +
>> +skip_mpidr_check:
>> + enabled_cpus++;
>> +
>> + /* allocate a logical cpu id for the new comer */
>> + if (cpu_logical_map(0) == mpidr) {
>> + /*
>> + * boot_cpu_init() already hold bit 0 in cpu_present_mask
>> + * for BSP, no need to allocate again.
>> + */
>> + cpu = 0;
>> + } else {
>> + cpu = cpumask_next_zero(-1, cpu_present_mask);
>> + }
>> +
>> + /* map the logical cpu id to cpu MPIDR */
>> + cpu_logical_map(cpu) = mpidr;
>> +
>> + set_cpu_possible(cpu, true);
>
> IMO it better to keep all these updates to cpumasks contained in the
> smp.c as I had mentioned before. I think you can refactor smp_init_cpus
> to achieve that.
Could you give me more hints? smp_init_cpus() use the CPU node in device
tree to map cpu, but in ACPI, they are table entries, if you can give me
more hints about how to refactor it, I will appreciate a lot.
>
>> + set_cpu_present(cpu, true);
>
> This is totally wrong ? What would you do if the cpu failed to
> initialize ? I don't see that handled.
>
>> +
>> + return cpu;
>> +}
>> +
>> +static int __init
>> +acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
>> + const unsigned long end)
>> +{
>> + struct acpi_madt_generic_interrupt *processor;
>> +
>> + processor = (struct acpi_madt_generic_interrupt *)header;
>> +
>> + if (BAD_MADT_ENTRY(processor, end))
>> + return -EINVAL;
>> +
>> + acpi_table_print_madt_entry(header);
>> +
>> + acpi_register_gic_cpu_interface(processor->arm_mpidr,
>> + processor->flags & ACPI_MADT_ENABLED);
>> +
>> + return 0;
>> +}
>> +
>> +/*
>> + * Parse GIC cpu interface related entries in MADT
>> + * returns 0 on success, < 0 on error
>> + */
>> +static int __init acpi_parse_madt_gic_cpu_interface_entries(void)
>> +{
>> + int count;
>> +
>> + /*
>> + * do a partial walk of MADT to determine how many CPUs
>> + * we have including disabled CPUs, and get information
>> + * we need for SMP init
>> + */
>> + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
>> + acpi_parse_gic_cpu_interface, MAX_GIC_CPU_INTERFACE);
>> +
>> + if (!count) {
>> + pr_err("No GIC CPU interface entries present\n");
>> + return -ENODEV;
>> + } else if (count < 0) {
>> + pr_err("Error parsing GIC CPU interface entry\n");
>> + return count;
>> + }
>> +
>> + /* Make boot-up look pretty */
>> + pr_info("%d CPUs enabled, %d CPUs total\n", enabled_cpus, total_cpus);
>
> Ideally just setup cpu_logical_map in acpi_parse_gic_cpu_interface and
> setup cpumasks in smp_init_cpus.
>
>> +
>> + return 0;
>> +}
>> +
>> static int __init acpi_parse_fadt(struct acpi_table_header *table)
>> {
>> struct acpi_table_fadt *fadt = (struct acpi_table_fadt *)table;
>> @@ -99,8 +220,12 @@ int __init acpi_boot_init(void)
>> return -ENODEV;
>>
>> err = acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
>> - if (err)
>> - pr_err("Can't find FADT\n");
>> + if (err) {
>> + pr_err("Can't find FADT or error happened during parsing FADT\n");
>> + return err;
>> + }
>> +
>> + err = acpi_parse_madt_gic_cpu_interface_entries();
>>
>> return err;
>> }
>> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
>> index 40f38f4..8f1d37c 100644
>> --- a/arch/arm64/kernel/smp.c
>> +++ b/arch/arm64/kernel/smp.c
>> @@ -36,6 +36,7 @@
>> #include <linux/completion.h>
>> #include <linux/of.h>
>> #include <linux/irq_work.h>
>> +#include <linux/acpi.h>
>>
>> #include <asm/atomic.h>
>> #include <asm/cacheflush.h>
>> @@ -458,7 +459,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
>> if (err)
>> continue;
>>
>> - set_cpu_present(cpu, true);
>> + /*
>> + * In ACPI mode, cpu_present_map was initialised when
>> + * MADT table was parsed which before this function
>> + * is called.
>> + */
>> + if (acpi_disabled)
>> + set_cpu_present(cpu, true);
>> +
>
> This is the right place to set the cpu present based on the return value
> of cpu_prepare.
Yes, as I replied in previous email, I will update the patch and consider
CPU hotplug in the future.
Thanks
Hanjun
next prev parent reply other threads:[~2014-08-19 11:01 UTC|newest]
Thread overview: 178+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-04 15:28 [PATCH v2 00/18] Introduce ACPI for ARM64 based on ACPI 5.1 Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 01/18] ARM64: Move the init of cpu_logical_map(0) before unflatten_device_tree() Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 02/18] ARM64 / ACPI: Get RSDP and ACPI boot-time tables Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 18:30 ` Sudeep Holla
2014-08-18 18:30 ` Sudeep Holla
2014-08-18 18:30 ` Sudeep Holla
2014-08-19 9:35 ` Hanjun Guo
2014-08-19 9:35 ` Hanjun Guo
2014-08-19 9:35 ` Hanjun Guo
2014-08-19 9:47 ` Sudeep Holla
2014-08-19 9:47 ` Sudeep Holla
2014-08-19 9:47 ` Sudeep Holla
2014-08-04 15:28 ` [PATCH v2 03/18] ARM64 / ACPI: Introduce lowlevel suspend function Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 04/18] ARM64 / ACPI: Make PCI optional for ACPI on ARM64 Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 05/18] ARM64 / ACPI: Parse FADT table to get PSCI flags for PSCI init Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 14:27 ` Catalin Marinas
2014-08-18 14:27 ` Catalin Marinas
2014-08-19 3:50 ` Hanjun Guo
2014-08-19 3:50 ` Hanjun Guo
2014-08-19 3:50 ` Hanjun Guo
2014-08-19 11:10 ` Mark Rutland
2014-08-19 11:10 ` Mark Rutland
2014-08-19 11:10 ` Mark Rutland
2014-08-19 12:13 ` Hanjun Guo
2014-08-19 12:13 ` Hanjun Guo
2014-08-19 12:13 ` Hanjun Guo
2014-08-19 22:55 ` Moore, Robert
2014-08-19 22:55 ` Moore, Robert
2014-08-19 22:55 ` Moore, Robert
2014-08-20 4:12 ` Hanjun Guo
2014-08-20 4:12 ` Hanjun Guo
2014-08-20 4:12 ` Hanjun Guo
2014-08-18 18:32 ` Sudeep Holla
2014-08-18 18:32 ` Sudeep Holla
2014-08-18 18:32 ` Sudeep Holla
2014-08-19 10:39 ` Hanjun Guo
2014-08-19 10:39 ` Hanjun Guo
2014-08-19 10:39 ` Hanjun Guo
2014-08-19 11:07 ` Sudeep Holla
2014-08-19 11:07 ` Sudeep Holla
2014-08-19 11:07 ` Sudeep Holla
2014-08-04 15:28 ` [PATCH v2 06/18] ARM64 / ACPI: Parse MADT to map logical cpu to MPIDR and get cpu_possible/present_map Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 14:27 ` Catalin Marinas
2014-08-18 14:27 ` Catalin Marinas
2014-08-19 7:36 ` Hanjun Guo
2014-08-19 7:36 ` Hanjun Guo
2014-08-19 7:36 ` Hanjun Guo
2014-08-20 14:38 ` Catalin Marinas
2014-08-20 14:38 ` Catalin Marinas
2014-08-20 14:38 ` Catalin Marinas
2014-08-21 2:51 ` Hanjun Guo
2014-08-21 2:51 ` Hanjun Guo
2014-08-21 2:51 ` Hanjun Guo
2014-08-18 18:33 ` Sudeep Holla
2014-08-18 18:33 ` Sudeep Holla
2014-08-18 18:33 ` Sudeep Holla
2014-08-19 11:00 ` Hanjun Guo [this message]
2014-08-19 11:00 ` Hanjun Guo
2014-08-19 11:00 ` Hanjun Guo
2014-08-19 16:46 ` [Linaro-acpi] " Zi Shen Lim
2014-08-19 16:46 ` Zi Shen Lim
2014-08-19 16:46 ` Zi Shen Lim
2014-08-20 3:24 ` Hanjun Guo
2014-08-20 3:24 ` Hanjun Guo
2014-08-20 3:24 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 07/18] ACPI / table: Print GIC information when MADT is parsed Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-07 1:41 ` Zheng, Lv
2014-08-07 1:41 ` Zheng, Lv
2014-08-07 10:28 ` Hanjun Guo
2014-08-07 10:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 08/18] ARM64 / ACPI: Get the enable method for SMP initialization in ACPI way Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 14:27 ` Catalin Marinas
2014-08-18 14:27 ` Catalin Marinas
2014-08-19 8:32 ` Hanjun Guo
2014-08-19 8:32 ` Hanjun Guo
2014-08-19 8:32 ` Hanjun Guo
2014-08-20 14:52 ` Catalin Marinas
2014-08-20 14:52 ` Catalin Marinas
2014-08-20 14:52 ` Catalin Marinas
2014-08-21 3:06 ` Hanjun Guo
2014-08-21 3:06 ` Hanjun Guo
2014-08-21 3:06 ` Hanjun Guo
2014-08-18 18:34 ` Sudeep Holla
2014-08-18 18:34 ` Sudeep Holla
2014-08-18 18:34 ` Sudeep Holla
2014-08-19 11:26 ` Hanjun Guo
2014-08-19 11:26 ` Hanjun Guo
2014-08-19 11:26 ` Hanjun Guo
2014-08-18 18:56 ` Geoff Levand
2014-08-18 18:56 ` Geoff Levand
2014-08-18 18:56 ` Geoff Levand
2014-08-19 12:11 ` Hanjun Guo
2014-08-19 12:11 ` Hanjun Guo
2014-08-19 12:11 ` Hanjun Guo
2014-08-19 19:25 ` Geoff Levand
2014-08-19 19:25 ` Geoff Levand
2014-08-19 19:25 ` Geoff Levand
2014-08-20 3:25 ` Hanjun Guo
2014-08-20 3:25 ` Hanjun Guo
2014-08-20 3:25 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 09/18] ACPI / processor: Make it possible to get CPU hardware ID via GICC Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 14:27 ` Catalin Marinas
2014-08-18 14:27 ` Catalin Marinas
2014-08-19 8:37 ` Hanjun Guo
2014-08-19 8:37 ` Hanjun Guo
2014-08-19 8:37 ` Hanjun Guo
2014-08-20 14:56 ` Catalin Marinas
2014-08-20 14:56 ` Catalin Marinas
2014-08-20 14:56 ` Catalin Marinas
2014-08-21 3:25 ` Hanjun Guo
2014-08-21 3:25 ` Hanjun Guo
2014-08-21 3:25 ` Hanjun Guo
2014-08-18 18:34 ` Sudeep Holla
2014-08-18 18:34 ` Sudeep Holla
2014-08-18 18:34 ` Sudeep Holla
2014-08-19 11:29 ` Hanjun Guo
2014-08-19 11:29 ` Hanjun Guo
2014-08-19 11:29 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 10/18] ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 18:34 ` Sudeep Holla
2014-08-18 18:34 ` Sudeep Holla
2014-08-18 18:34 ` Sudeep Holla
2014-08-19 11:36 ` Hanjun Guo
2014-08-19 11:36 ` Hanjun Guo
2014-08-19 11:36 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 11/18] ACPI / table: Add new function to get table entries Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 12/18] ARM64 / ACPI: Add GICv2 specific ACPI boot support Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 13/18] ARM64 / ACPI: Parse GTDT to initialize arch timer Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 14/18] ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64 Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 15/18] ARM64 / ACPI: Introduce early_param for "acpi" and set ACPI default off Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 16/18] ARM64 / ACPI: If we chose to boot from acpi then disable FDT Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 17/18] ARM64 / ACPI: Enable ARM64 in Kconfig Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-18 14:27 ` Catalin Marinas
2014-08-18 14:27 ` Catalin Marinas
2014-08-19 8:38 ` Hanjun Guo
2014-08-19 8:38 ` Hanjun Guo
2014-08-19 8:38 ` Hanjun Guo
2014-08-04 15:28 ` [PATCH v2 18/18] Documentation: ACPI for ARM64 Hanjun Guo
2014-08-04 15:28 ` Hanjun Guo
2014-08-04 20:48 ` Randy Dunlap
2014-08-04 20:48 ` Randy Dunlap
2014-08-05 3:36 ` Hanjun Guo
2014-08-05 3:36 ` Hanjun Guo
2014-08-05 3:36 ` Hanjun Guo
[not found] ` <CAJRNFK+UfJhGR65tOecy=X+YdHQHiNPZ4p_p8LUxhRL3GW5gFw@mail.gmail.com>
2014-08-05 3:34 ` [Linaro-acpi] [PATCH v2 00/18] Introduce ACPI for ARM64 based on ACPI 5.1 Hanjun Guo
2014-08-05 3:34 ` Hanjun Guo
2014-08-05 3:34 ` Hanjun Guo
2014-08-18 17:08 ` Alexander Spyridakis
2014-08-18 17:08 ` Alexander Spyridakis
2014-08-18 18:11 ` Graeme Gregory
2014-08-18 18:11 ` Graeme Gregory
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