From: masami.hiramatsu.pt@hitachi.com (Masami Hiramatsu)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 3/3] kprobes: arm: enable OPTPROBES for ARM 32
Date: Thu, 28 Aug 2014 19:20:15 +0900 [thread overview]
Message-ID: <53FF025F.4080206@hitachi.com> (raw)
In-Reply-To: <1409144552-12751-4-git-send-email-wangnan0@huawei.com>
(2014/08/27 22:02), Wang Nan wrote:
> +/*
> + * ARM can always optimize an instruction when using ARM ISA.
> + */
Hmm, this comment looks not correct anymore :)
> +int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
> +{
> + return optinsn->prepared;
> +}
BTW, why don't you check optinsn->insn != NULL ?
If it is not prepared for optimizing, optinsn->insn always be NULL.
[...]
> +int arch_prepare_optimized_kprobe(struct optimized_kprobe *op)
> +{
> + u8 *buf;
> + unsigned long rel_chk;
> + unsigned long val;
> +
> + if (!can_optimize(op))
> + return -EILSEQ;
> +
> + op->optinsn.insn = get_optinsn_slot();
> + if (!op->optinsn.insn)
> + return -ENOMEM;
> +
> + /*
> + * Verify if the address gap is in 32MiB range, because this uses
> + * a relative jump.
> + *
> + * kprobe opt use a 'b' instruction to branch to optinsn.insn.
> + * According to ARM manual, branch instruction is:
> + *
> + * 31 28 27 24 23 0
> + * +------+---+---+---+---+----------------+
> + * | cond | 1 | 0 | 1 | 0 | imm24 |
> + * +------+---+---+---+---+----------------+
> + *
> + * imm24 is a signed 24 bits integer. The real branch offset is computed
> + * by: imm32 = SignExtend(imm24:'00', 32);
> + *
> + * So the maximum forward branch should be:
> + * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
> + * The maximum backword branch should be:
> + * (0xff800000 << 2) = 0xfe000000 = -0x2000000
> + *
> + * We can simply check (rel & 0xfe000003):
> + * if rel is positive, (rel & 0xfe000000) shoule be 0
> + * if rel is negitive, (rel & 0xfe000000) should be 0xfe000000
> + * the last '3' is used for alignment checking.
> + */
> + rel_chk = (unsigned long)((long)op->optinsn.insn -
> + (long)op->kp.addr + 8) & 0xfe000003;
> +
> + if ((rel_chk != 0) && (rel_chk != 0xfe000000)) {
> + __arch_remove_optimized_kprobe(op, 0);
> + return -ERANGE;
> + }
> +
> + buf = (u8 *)op->optinsn.insn;
> +
> + /* Copy arch-dep-instance from template */
> + memcpy(buf, &optprobe_template_entry, TMPL_END_IDX);
> +
> + /* Set probe information */
> + val = (unsigned long)op;
> + memcpy(buf + TMPL_VAL_IDX, &val, sizeof(val));
> +
> + /* Set probe function call */
> + val = (unsigned long)optimized_callback;
> + memcpy(buf + TMPL_CALL_IDX, &val, sizeof(val));
> +
> + flush_icache_range((unsigned long)buf,
> + (unsigned long)buf + TMPL_END_IDX);
> +
> + op->optinsn.prepared = true;
> + return 0;
> +}
> +
Thank you,
--
Masami HIRAMATSU
Software Platform Research Dept. Linux Technology Research Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu.pt at hitachi.com
WARNING: multiple messages have this Message-ID (diff)
From: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
To: Wang Nan <wangnan0@huawei.com>
Cc: Russell King <linux@arm.linux.org.uk>,
"David A. Long" <dave.long@linaro.org>,
Jon Medhurst <tixy@linaro.org>,
Taras Kondratiuk <taras.kondratiuk@linaro.org>,
Ben Dooks <ben.dooks@codethink.co.uk>,
Ananth N Mavinakayanahalli <ananth@in.ibm.com>,
Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>,
"David S. Miller" <davem@davemloft.net>,
Will Deacon <will.deacon@arm.com>,
Pei Feiyue <peifeiyue@huawei.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 3/3] kprobes: arm: enable OPTPROBES for ARM 32
Date: Thu, 28 Aug 2014 19:20:15 +0900 [thread overview]
Message-ID: <53FF025F.4080206@hitachi.com> (raw)
In-Reply-To: <1409144552-12751-4-git-send-email-wangnan0@huawei.com>
(2014/08/27 22:02), Wang Nan wrote:
> +/*
> + * ARM can always optimize an instruction when using ARM ISA.
> + */
Hmm, this comment looks not correct anymore :)
> +int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
> +{
> + return optinsn->prepared;
> +}
BTW, why don't you check optinsn->insn != NULL ?
If it is not prepared for optimizing, optinsn->insn always be NULL.
[...]
> +int arch_prepare_optimized_kprobe(struct optimized_kprobe *op)
> +{
> + u8 *buf;
> + unsigned long rel_chk;
> + unsigned long val;
> +
> + if (!can_optimize(op))
> + return -EILSEQ;
> +
> + op->optinsn.insn = get_optinsn_slot();
> + if (!op->optinsn.insn)
> + return -ENOMEM;
> +
> + /*
> + * Verify if the address gap is in 32MiB range, because this uses
> + * a relative jump.
> + *
> + * kprobe opt use a 'b' instruction to branch to optinsn.insn.
> + * According to ARM manual, branch instruction is:
> + *
> + * 31 28 27 24 23 0
> + * +------+---+---+---+---+----------------+
> + * | cond | 1 | 0 | 1 | 0 | imm24 |
> + * +------+---+---+---+---+----------------+
> + *
> + * imm24 is a signed 24 bits integer. The real branch offset is computed
> + * by: imm32 = SignExtend(imm24:'00', 32);
> + *
> + * So the maximum forward branch should be:
> + * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
> + * The maximum backword branch should be:
> + * (0xff800000 << 2) = 0xfe000000 = -0x2000000
> + *
> + * We can simply check (rel & 0xfe000003):
> + * if rel is positive, (rel & 0xfe000000) shoule be 0
> + * if rel is negitive, (rel & 0xfe000000) should be 0xfe000000
> + * the last '3' is used for alignment checking.
> + */
> + rel_chk = (unsigned long)((long)op->optinsn.insn -
> + (long)op->kp.addr + 8) & 0xfe000003;
> +
> + if ((rel_chk != 0) && (rel_chk != 0xfe000000)) {
> + __arch_remove_optimized_kprobe(op, 0);
> + return -ERANGE;
> + }
> +
> + buf = (u8 *)op->optinsn.insn;
> +
> + /* Copy arch-dep-instance from template */
> + memcpy(buf, &optprobe_template_entry, TMPL_END_IDX);
> +
> + /* Set probe information */
> + val = (unsigned long)op;
> + memcpy(buf + TMPL_VAL_IDX, &val, sizeof(val));
> +
> + /* Set probe function call */
> + val = (unsigned long)optimized_callback;
> + memcpy(buf + TMPL_CALL_IDX, &val, sizeof(val));
> +
> + flush_icache_range((unsigned long)buf,
> + (unsigned long)buf + TMPL_END_IDX);
> +
> + op->optinsn.prepared = true;
> + return 0;
> +}
> +
Thank you,
--
Masami HIRAMATSU
Software Platform Research Dept. Linux Technology Research Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu.pt@hitachi.com
next prev parent reply other threads:[~2014-08-28 10:20 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-08-27 13:02 [PATCH v5 0/3] kprobes: arm: enable OPTPROBES for ARM 32 Wang Nan
2014-08-27 13:02 ` Wang Nan
2014-08-27 13:02 ` [PATCH v5 1/3] ARM: probes: check stack operation when decoding Wang Nan
2014-08-27 13:02 ` Wang Nan
2014-08-28 9:51 ` Masami Hiramatsu
2014-08-28 9:51 ` Masami Hiramatsu
2014-08-28 10:20 ` Russell King - ARM Linux
2014-08-28 10:20 ` Russell King - ARM Linux
2014-08-28 10:24 ` Will Deacon
2014-08-28 10:24 ` Will Deacon
2014-08-29 8:47 ` Jon Medhurst (Tixy)
2014-08-29 8:47 ` Jon Medhurst (Tixy)
2014-08-30 1:28 ` Wang Nan
2014-08-30 1:28 ` Wang Nan
2014-09-01 17:29 ` Jon Medhurst (Tixy)
2014-09-01 17:29 ` Jon Medhurst (Tixy)
2014-08-27 13:02 ` [PATCH v5 2/3] kprobes: copy ainsn after alloc aggr kprobe Wang Nan
2014-08-27 13:02 ` Wang Nan
2014-08-28 9:39 ` Masami Hiramatsu
2014-08-28 9:39 ` Masami Hiramatsu
2014-08-28 11:07 ` Wang Nan
2014-08-28 11:07 ` Wang Nan
2014-08-27 13:02 ` [PATCH v5 3/3] kprobes: arm: enable OPTPROBES for ARM 32 Wang Nan
2014-08-27 13:02 ` Wang Nan
2014-08-28 10:20 ` Masami Hiramatsu [this message]
2014-08-28 10:20 ` Masami Hiramatsu
2014-09-02 13:49 ` Jon Medhurst (Tixy)
2014-09-02 13:49 ` Jon Medhurst (Tixy)
2014-09-03 10:18 ` Masami Hiramatsu
2014-09-03 10:18 ` Masami Hiramatsu
2014-09-03 10:30 ` Will Deacon
2014-09-03 10:30 ` Will Deacon
2014-09-04 10:40 ` Jon Medhurst (Tixy)
2014-09-04 10:40 ` Jon Medhurst (Tixy)
2014-09-04 10:52 ` Will Deacon
2014-09-04 10:52 ` Will Deacon
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