From: Guenter Roeck <linux@roeck-us.net>
To: Jisheng Zhang <jszhang@marvell.com>, wim@iguana.be
Cc: linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] watchdog: dw_wdt: restart the counter immediately after enabling WDT
Date: Sat, 20 Sep 2014 06:51:56 -0700 [thread overview]
Message-ID: <541D867C.6080407@roeck-us.net> (raw)
In-Reply-To: <1411108199-1280-2-git-send-email-jszhang@marvell.com>
On 09/18/2014 11:29 PM, Jisheng Zhang wrote:
> The TOP_INIT may be zero, so the timeout period may be very short after
> initialization is done, thus the system may be reset soon after enabling.
> We fix this problem by restarting the counter immediately after enabling
> WDT.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
> drivers/watchdog/dw_wdt.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> index 9f21029..ad0619d 100644
> --- a/drivers/watchdog/dw_wdt.c
> +++ b/drivers/watchdog/dw_wdt.c
> @@ -146,6 +146,7 @@ static int dw_wdt_open(struct inode *inode, struct file *filp)
> dw_wdt_set_top(DW_WDT_MAX_TOP);
> writel(WDOG_CONTROL_REG_WDT_EN_MASK,
> dw_wdt.regs + WDOG_CONTROL_REG_OFFSET);
> + dw_wdt_keepalive();
> }
>
> dw_wdt_set_next_heartbeat();
>
After getting access to the datasheet, I concluded that this fix is wrong
or at least more risky than necessary. The datasheet states that top_init,
ie bit 4-7 of the wdt_torr register, needs to be initialized with the desired
timeout period prior to enabling the watchdog. dw_wdt_set_top() sets it to
0 instead, ie to the lowest possible timeout period.
Guenter
WARNING: multiple messages have this Message-ID (diff)
From: linux@roeck-us.net (Guenter Roeck)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] watchdog: dw_wdt: restart the counter immediately after enabling WDT
Date: Sat, 20 Sep 2014 06:51:56 -0700 [thread overview]
Message-ID: <541D867C.6080407@roeck-us.net> (raw)
In-Reply-To: <1411108199-1280-2-git-send-email-jszhang@marvell.com>
On 09/18/2014 11:29 PM, Jisheng Zhang wrote:
> The TOP_INIT may be zero, so the timeout period may be very short after
> initialization is done, thus the system may be reset soon after enabling.
> We fix this problem by restarting the counter immediately after enabling
> WDT.
>
> Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
> ---
> drivers/watchdog/dw_wdt.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/watchdog/dw_wdt.c b/drivers/watchdog/dw_wdt.c
> index 9f21029..ad0619d 100644
> --- a/drivers/watchdog/dw_wdt.c
> +++ b/drivers/watchdog/dw_wdt.c
> @@ -146,6 +146,7 @@ static int dw_wdt_open(struct inode *inode, struct file *filp)
> dw_wdt_set_top(DW_WDT_MAX_TOP);
> writel(WDOG_CONTROL_REG_WDT_EN_MASK,
> dw_wdt.regs + WDOG_CONTROL_REG_OFFSET);
> + dw_wdt_keepalive();
> }
>
> dw_wdt_set_next_heartbeat();
>
After getting access to the datasheet, I concluded that this fix is wrong
or at least more risky than necessary. The datasheet states that top_init,
ie bit 4-7 of the wdt_torr register, needs to be initialized with the desired
timeout period prior to enabling the watchdog. dw_wdt_set_top() sets it to
0 instead, ie to the lowest possible timeout period.
Guenter
next prev parent reply other threads:[~2014-09-20 13:52 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-19 6:29 [PATCH 0/2] watchdog: dw_wdt: one bug fix and restart handler support Jisheng Zhang
2014-09-19 6:29 ` Jisheng Zhang
2014-09-19 6:29 ` [PATCH 1/2] watchdog: dw_wdt: restart the counter immediately after enabling WDT Jisheng Zhang
2014-09-19 6:29 ` Jisheng Zhang
2014-09-19 17:27 ` Guenter Roeck
2014-09-19 17:27 ` Guenter Roeck
2014-09-20 13:51 ` Guenter Roeck [this message]
2014-09-20 13:51 ` Guenter Roeck
2014-09-23 7:45 ` Jisheng Zhang
2014-09-23 7:45 ` Jisheng Zhang
2014-09-19 6:29 ` [PATCH 2/2] watchdog: dw_wdt: add restart handler support Jisheng Zhang
2014-09-19 6:29 ` Jisheng Zhang
2014-09-20 3:07 ` Guenter Roeck
2014-09-20 3:07 ` Guenter Roeck
2014-09-20 14:08 ` Guenter Roeck
2014-09-20 14:08 ` Guenter Roeck
2014-09-23 6:57 ` Jisheng Zhang
2014-09-23 6:57 ` Jisheng Zhang
2014-09-20 21:09 ` Guenter Roeck
2014-09-20 21:09 ` Guenter Roeck
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