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From: afaerber@suse.de (Andreas Färber)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/6] arm64: Add DTS support for Spreadtrum's Shark64 SoC
Date: Mon, 29 Sep 2014 16:55:25 +0200	[thread overview]
Message-ID: <542972DD.8020700@suse.de> (raw)
In-Reply-To: <1411991314-6636-3-git-send-email-zhang.lyra@gmail.com>

Hi,

Am 29.09.2014 um 13:48 schrieb zhang.lyra at gmail.com:
> From: "zhizhou.zhang" <zhizhou.zhang@spreadtrum.com>
> 
> Adds the device tree support for Spreadtrum Shark64 SoC based on ARMv8 architecture.
> 
> Signed-off-by: zhizhou.zhang <zhizhou.zhang@spreadtrum.com>
> Signed-off-by: chunyan.zhang <chunyan.zhang@spreadtrum.com>
> ---
>  arch/arm64/boot/dts/sprd_shark64.dts |  110 ++++++++++++++++++++++++++++++++++
>  1 file changed, 110 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/sprd_shark64.dts
> 
> diff --git a/arch/arm64/boot/dts/sprd_shark64.dts b/arch/arm64/boot/dts/sprd_shark64.dts
> new file mode 100644
> index 0000000..537cd6d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/sprd_shark64.dts
> @@ -0,0 +1,110 @@
> +/*
> + * dts file for Spreadtrum(sprd) Shark64 SOC
> + *
> + * Copyright (C) 2014,  Spreadtrum Communications Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +/memreserve/ 0x80000000 0x00010000;
> +
> +/ {
> +	model = "shark64 Board";

The commit message says SoC but here it says Board. Usually the SoC goes
into a .dtsi file that can then be reused for multiple boards (.dts).
Even if you only have one board for now, this distinction makes sense.

You can use status = "disabled"; to prepare nodes in the .dtsi and then
override the ones used via status = "okay"; in the .dts file. UARTs are
a typical example where you will see this pattern used.

> +	compatible = "sprd,shark64";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	chosen {
> +		bootargs = "earlycon=serial_sprd,0x70000000";
> +      };

Some spaces snuck into this line. ;)

Cheers,
Andreas

> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu at 0 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu at 1 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x1>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu at 2 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x2>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu at 3 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x3>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +	};
> +
> +	memory at 80000000 {
> +		device_type = "memory";
> +		reg = <0 0x80000000 0 0x20000000>;
> +	};
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	gic: interrupt-controller at 12001000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		#address-cells = <0>;
> +		interrupt-controller;
> +		reg = <0 0x12001000 0 0x1000>,
> +		      <0 0x12002000 0 0x1000>;
> +	};
> +
> +	intc:interrupt-controller at 71400000 {
> +		compatible = "sprd,intc";
> +		#interrupt-cells = <0>;
> +		interrupt-controller;
> +		reg =	<0 0x71400000 0 0x1000>,
> +			<0 0x71500000 0 0x1000>,
> +			<0 0x71600000 0 0x1000>,
> +			<0 0x71700000 0 0x1000>;
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <1 13 0xff01>,
> +			     <1 14 0xff01>,
> +			     <1 11 0xff01>,
> +			     <1 10 0xff01>;
> +		clock-frequency = <26000000>;
> +	};
> +
> +	uart0: uart at 70000000 {
> +		compatible = "sprd,serial";
> +		reg = <0 0x70000000 0 0x100>;
> +		interrupts = <0 2 0xf04>;
> +	};
> +
> +	uart1: uart at 70100000 {
> +		compatible = "sprd,serial";
> +		reg = <0 0x70100000 0 0x100>;
> +		interrupts = <0 3 0xf04>;
> +	};
> +};

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imend?rffer; HRB 16746 AG N?rnberg

WARNING: multiple messages have this Message-ID (diff)
From: "Andreas Färber" <afaerber-l3A5Bk7waGM@public.gmane.org>
To: zhang.lyra-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Cc: catalin.marinas-5wv7dgnIgG8@public.gmane.org,
	gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	jslaby-AlSwsSmVLrQ@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	broonie-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	m-karicheri2-l0cyMroinI0@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	artagnon-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	will.deacon-5wv7dgnIgG8@public.gmane.org,
	orsonzhai-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	geng.ren-lxIno14LUO0EEoCn2XhGlw@public.gmane.org,
	zhizhou.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 2/6] arm64: Add DTS support for Spreadtrum's Shark64 SoC
Date: Mon, 29 Sep 2014 16:55:25 +0200	[thread overview]
Message-ID: <542972DD.8020700@suse.de> (raw)
In-Reply-To: <1411991314-6636-3-git-send-email-zhang.lyra-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

Hi,

Am 29.09.2014 um 13:48 schrieb zhang.lyra-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org:
> From: "zhizhou.zhang" <zhizhou.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
> 
> Adds the device tree support for Spreadtrum Shark64 SoC based on ARMv8 architecture.
> 
> Signed-off-by: zhizhou.zhang <zhizhou.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
> Signed-off-by: chunyan.zhang <chunyan.zhang-lxIno14LUO0EEoCn2XhGlw@public.gmane.org>
> ---
>  arch/arm64/boot/dts/sprd_shark64.dts |  110 ++++++++++++++++++++++++++++++++++
>  1 file changed, 110 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/sprd_shark64.dts
> 
> diff --git a/arch/arm64/boot/dts/sprd_shark64.dts b/arch/arm64/boot/dts/sprd_shark64.dts
> new file mode 100644
> index 0000000..537cd6d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/sprd_shark64.dts
> @@ -0,0 +1,110 @@
> +/*
> + * dts file for Spreadtrum(sprd) Shark64 SOC
> + *
> + * Copyright (C) 2014,  Spreadtrum Communications Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +/memreserve/ 0x80000000 0x00010000;
> +
> +/ {
> +	model = "shark64 Board";

The commit message says SoC but here it says Board. Usually the SoC goes
into a .dtsi file that can then be reused for multiple boards (.dts).
Even if you only have one board for now, this distinction makes sense.

You can use status = "disabled"; to prepare nodes in the .dtsi and then
override the ones used via status = "okay"; in the .dts file. UARTs are
a typical example where you will see this pattern used.

> +	compatible = "sprd,shark64";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	chosen {
> +		bootargs = "earlycon=serial_sprd,0x70000000";
> +      };

Some spaces snuck into this line. ;)

Cheers,
Andreas

> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x1>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu@2 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x2>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu@3 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x3>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +	};
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		reg = <0 0x80000000 0 0x20000000>;
> +	};
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	gic: interrupt-controller@12001000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		#address-cells = <0>;
> +		interrupt-controller;
> +		reg = <0 0x12001000 0 0x1000>,
> +		      <0 0x12002000 0 0x1000>;
> +	};
> +
> +	intc:interrupt-controller@71400000 {
> +		compatible = "sprd,intc";
> +		#interrupt-cells = <0>;
> +		interrupt-controller;
> +		reg =	<0 0x71400000 0 0x1000>,
> +			<0 0x71500000 0 0x1000>,
> +			<0 0x71600000 0 0x1000>,
> +			<0 0x71700000 0 0x1000>;
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <1 13 0xff01>,
> +			     <1 14 0xff01>,
> +			     <1 11 0xff01>,
> +			     <1 10 0xff01>;
> +		clock-frequency = <26000000>;
> +	};
> +
> +	uart0: uart@70000000 {
> +		compatible = "sprd,serial";
> +		reg = <0 0x70000000 0 0x100>;
> +		interrupts = <0 2 0xf04>;
> +	};
> +
> +	uart1: uart@70100000 {
> +		compatible = "sprd,serial";
> +		reg = <0 0x70100000 0 0x100>;
> +		interrupts = <0 3 0xf04>;
> +	};
> +};

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
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WARNING: multiple messages have this Message-ID (diff)
From: "Andreas Färber" <afaerber@suse.de>
To: zhang.lyra@gmail.com
Cc: catalin.marinas@arm.com, gregkh@linuxfoundation.org,
	ijc+devicetree@hellion.org.uk, jslaby@suse.cz,
	galak@codeaurora.org, broonie@linaro.org, mark.rutland@arm.com,
	m-karicheri2@ti.com, pawel.moll@arm.com, artagnon@gmail.com,
	rrichter@cavium.com, robh+dt@kernel.org, will.deacon@arm.com,
	orsonzhai@gmail.com, geng.ren@spreadtrum.com,
	zhizhou.zhang@spreadtrum.com, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/6] arm64: Add DTS support for Spreadtrum's Shark64 SoC
Date: Mon, 29 Sep 2014 16:55:25 +0200	[thread overview]
Message-ID: <542972DD.8020700@suse.de> (raw)
In-Reply-To: <1411991314-6636-3-git-send-email-zhang.lyra@gmail.com>

Hi,

Am 29.09.2014 um 13:48 schrieb zhang.lyra@gmail.com:
> From: "zhizhou.zhang" <zhizhou.zhang@spreadtrum.com>
> 
> Adds the device tree support for Spreadtrum Shark64 SoC based on ARMv8 architecture.
> 
> Signed-off-by: zhizhou.zhang <zhizhou.zhang@spreadtrum.com>
> Signed-off-by: chunyan.zhang <chunyan.zhang@spreadtrum.com>
> ---
>  arch/arm64/boot/dts/sprd_shark64.dts |  110 ++++++++++++++++++++++++++++++++++
>  1 file changed, 110 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/sprd_shark64.dts
> 
> diff --git a/arch/arm64/boot/dts/sprd_shark64.dts b/arch/arm64/boot/dts/sprd_shark64.dts
> new file mode 100644
> index 0000000..537cd6d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/sprd_shark64.dts
> @@ -0,0 +1,110 @@
> +/*
> + * dts file for Spreadtrum(sprd) Shark64 SOC
> + *
> + * Copyright (C) 2014,  Spreadtrum Communications Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +/memreserve/ 0x80000000 0x00010000;
> +
> +/ {
> +	model = "shark64 Board";

The commit message says SoC but here it says Board. Usually the SoC goes
into a .dtsi file that can then be reused for multiple boards (.dts).
Even if you only have one board for now, this distinction makes sense.

You can use status = "disabled"; to prepare nodes in the .dtsi and then
override the ones used via status = "okay"; in the .dts file. UARTs are
a typical example where you will see this pattern used.

> +	compatible = "sprd,shark64";
> +	interrupt-parent = <&gic>;
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	chosen {
> +		bootargs = "earlycon=serial_sprd,0x70000000";
> +      };

Some spaces snuck into this line. ;)

Cheers,
Andreas

> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x0>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu@1 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x1>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu@2 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x2>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +		cpu@3 {
> +			device_type = "cpu";
> +			compatible = "arm,armv8";
> +			reg = <0x0 0x3>;
> +			enable-method = "spin-table";
> +			cpu-release-addr = <0x0 0x8000fff8>;
> +		};
> +	};
> +
> +	memory@80000000 {
> +		device_type = "memory";
> +		reg = <0 0x80000000 0 0x20000000>;
> +	};
> +
> +	aliases {
> +		serial0 = &uart0;
> +		serial1 = &uart1;
> +	};
> +
> +	gic: interrupt-controller@12001000 {
> +		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
> +		#interrupt-cells = <3>;
> +		#address-cells = <0>;
> +		interrupt-controller;
> +		reg = <0 0x12001000 0 0x1000>,
> +		      <0 0x12002000 0 0x1000>;
> +	};
> +
> +	intc:interrupt-controller@71400000 {
> +		compatible = "sprd,intc";
> +		#interrupt-cells = <0>;
> +		interrupt-controller;
> +		reg =	<0 0x71400000 0 0x1000>,
> +			<0 0x71500000 0 0x1000>,
> +			<0 0x71600000 0 0x1000>,
> +			<0 0x71700000 0 0x1000>;
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <1 13 0xff01>,
> +			     <1 14 0xff01>,
> +			     <1 11 0xff01>,
> +			     <1 10 0xff01>;
> +		clock-frequency = <26000000>;
> +	};
> +
> +	uart0: uart@70000000 {
> +		compatible = "sprd,serial";
> +		reg = <0 0x70000000 0 0x100>;
> +		interrupts = <0 2 0xf04>;
> +	};
> +
> +	uart1: uart@70100000 {
> +		compatible = "sprd,serial";
> +		reg = <0 0x70100000 0 0x100>;
> +		interrupts = <0 3 0xf04>;
> +	};
> +};

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

  reply	other threads:[~2014-09-29 14:55 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-29 11:48 [PATCH 0/6] Add Spreadtrum Shark64 SoC support zhang.lyra at gmail.com
2014-09-29 11:48 ` zhang.lyra
2014-09-29 11:48 ` zhang.lyra-Re5JQEeQqe8AvxtiuMwx3w
2014-09-29 11:48 ` [PATCH 1/6] Documentation: DT: Add bindings for Spreadtrum serial zhang.lyra at gmail.com
2014-09-29 11:48   ` zhang.lyra
2014-09-29 11:48 ` [PATCH 2/6] arm64: Add DTS support for Spreadtrum's Shark64 SoC zhang.lyra at gmail.com
2014-09-29 11:48   ` zhang.lyra
2014-09-29 14:55   ` Andreas Färber [this message]
2014-09-29 14:55     ` Andreas Färber
2014-09-29 14:55     ` Andreas Färber
2014-09-29 11:48 ` [PATCH 3/6] arm64: dts/Makefile: Add " zhang.lyra at gmail.com
2014-09-29 11:48   ` zhang.lyra
2014-09-29 14:46   ` Andreas Färber
2014-09-29 14:46     ` Andreas Färber
2014-09-29 11:48 ` [PATCH 4/6] arm64: Add support for Spreadtrum's Shark64 SoC in Kconfig and defconfig zhang.lyra at gmail.com
2014-09-29 11:48   ` zhang.lyra
2014-09-29 11:48 ` [PATCH 5/6] tty/serial: Add Spreadtrum's serial earlycon zhang.lyra at gmail.com
2014-09-29 11:48   ` zhang.lyra
2014-09-29 11:48 ` [PATCH 6/6] Documentation: Add entry for Spreadtrum's Shark64 SoC zhang.lyra at gmail.com
2014-09-29 11:48   ` zhang.lyra
  -- strict thread matches above, loose matches on Subject: below --
2014-09-29 12:04 [PATCH 0/6] Add Spreadtrum Shark64 SoC support zhang.lyra at gmail.com
2014-09-29 12:04 ` [PATCH 2/6] arm64: Add DTS support for Spreadtrum's Shark64 SoC zhang.lyra at gmail.com
2014-09-29 12:04   ` zhang.lyra
2014-09-29 13:47   ` Arnd Bergmann
2014-09-29 13:47     ` Arnd Bergmann
2014-09-29 13:47     ` Arnd Bergmann
2014-10-01 11:17     ` Catalin Marinas
2014-10-01 11:17       ` Catalin Marinas
2014-10-01 11:17       ` Catalin Marinas
2014-10-15  3:17     ` Lyra Zhang
2014-10-15  3:17       ` Lyra Zhang
2014-10-15  3:17       ` Lyra Zhang
2014-10-20 19:00       ` Arnd Bergmann
2014-10-20 19:00         ` Arnd Bergmann
2014-10-21  1:28         ` Lyra Zhang
2014-10-21  1:28           ` Lyra Zhang
2014-10-21  1:28           ` Lyra Zhang
2014-10-01 11:23   ` Mark Rutland
2014-10-01 11:23     ` Mark Rutland
2014-10-01 11:23     ` Mark Rutland

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