From: Emil Medve <Emilian.Medve@Freescale.com>
To: Scott Wood <scottwood@Freescale.com>
Cc: yuantian.tang@Freescale.com, linuxppc-dev@lists.ozlabs.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/3] powerpc/dts: Factorize the clock control node
Date: Thu, 6 Nov 2014 09:34:13 -0600 [thread overview]
Message-ID: <545B94F5.6040308@Freescale.com> (raw)
In-Reply-To: <1414711297.23458.173.camel@snotra.buserror.net>
Hello Scott,
On 10/30/2014 06:21 PM, Scott Wood wrote:
>>> I don't think the mux stuff belongs here, given that clockgen2.dtsi
>>> doesn't have it, and I saw at least one clockgen1 user needing to
>>> supplement this with more muxes.
>>
>> The intent was to put here devices/nodes that are common per chassis
>> from the low to high end. Specific SoC would change/augment this as
>> appropriate. I could have put each node in its own file as we've done
>> elsewhere, but I thought it would be too much
>>
>> Yes, chassis v1 and v2 have differences, but that's not unexpected
>
> It just strikes me as being an awkward split of where each mux node
> goes. Is it guaranteed by the chassis that all v1 will have at least
> the first two muxes?
As far as I'm aware we're not building chassis v1 SoC(s) anymore
Cheers,
WARNING: multiple messages have this Message-ID (diff)
From: Emil Medve <Emilian.Medve-eDlz3WWmN0ll57MIdRCFDg@public.gmane.org>
To: Scott Wood <scottwood-eDlz3WWmN0ll57MIdRCFDg@public.gmane.org>
Cc: yuantian.tang-eDlz3WWmN0ll57MIdRCFDg@public.gmane.org,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/3] powerpc/dts: Factorize the clock control node
Date: Thu, 6 Nov 2014 09:34:13 -0600 [thread overview]
Message-ID: <545B94F5.6040308@Freescale.com> (raw)
In-Reply-To: <1414711297.23458.173.camel-88ow+0ZRuxG2UiBs7uKeOtHuzzzSOjJt@public.gmane.org>
Hello Scott,
On 10/30/2014 06:21 PM, Scott Wood wrote:
>>> I don't think the mux stuff belongs here, given that clockgen2.dtsi
>>> doesn't have it, and I saw at least one clockgen1 user needing to
>>> supplement this with more muxes.
>>
>> The intent was to put here devices/nodes that are common per chassis
>> from the low to high end. Specific SoC would change/augment this as
>> appropriate. I could have put each node in its own file as we've done
>> elsewhere, but I thought it would be too much
>>
>> Yes, chassis v1 and v2 have differences, but that's not unexpected
>
> It just strikes me as being an awkward split of where each mux node
> goes. Is it guaranteed by the chassis that all v1 will have at least
> the first two muxes?
As far as I'm aware we're not building chassis v1 SoC(s) anymore
Cheers,
--
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next prev parent reply other threads:[~2014-11-06 15:34 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-22 14:42 [PATCH 1/3] powerpc/dts: Factorize the clock control node Emil Medve
2014-10-22 14:42 ` Emil Medve
2014-10-22 14:42 ` [PATCH 2/3] dt/bindings: qoriq-clock: Add binding for the platform PLL Emil Medve
2014-10-22 14:42 ` Emil Medve
2014-10-28 23:23 ` Scott Wood
2014-10-28 23:23 ` Scott Wood
2014-10-22 14:42 ` [PATCH 3/3] powerpc/dts: Add node(s) " Emil Medve
2014-10-22 14:42 ` Emil Medve
2014-10-28 23:21 ` [PATCH 1/3] powerpc/dts: Factorize the clock control node Scott Wood
2014-10-28 23:21 ` Scott Wood
2014-10-30 13:58 ` Emil Medve
2014-10-30 13:58 ` Emil Medve
2014-10-30 23:21 ` Scott Wood
2014-10-30 23:21 ` Scott Wood
2014-11-06 15:34 ` Emil Medve [this message]
2014-11-06 15:34 ` Emil Medve
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