From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <Ian.Campbell@eu.citrix.com>,
Jan Beulich <JBeulich@suse.com>
Cc: Keir Fraser <keir@xen.org>,
Stefano Stabellini <stefano.stabellini@eu.citrix.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Tim Deegan <tim@xen.org>, David Vrabel <david.vrabel@citrix.com>,
xen-devel <xen-devel@lists.xenproject.org>,
Ian Jackson <Ian.Jackson@eu.citrix.com>
Subject: Re: [PATCH] have architectures specify the number of PIRQs a hardware domain gets
Date: Fri, 05 Dec 2014 14:36:59 +0000 [thread overview]
Message-ID: <5481C30B.3020901@linaro.org> (raw)
In-Reply-To: <1417789634.22808.66.camel@eu.citrix.com>
Hi,
On 05/12/14 14:27, Ian Campbell wrote:
> On Fri, 2014-12-05 at 13:51 +0000, Jan Beulich wrote:
>> #define nr_static_irqs NR_IRQS
>> +#define arch_hwdom_irqs(domid) NR_IRQS
>
> FWIW gic_number_lines() is the ARM equivalent of getting the number of
> GSIs.
>
> *BUT* we don't actually use pirqs on ARM (everything goes via the
> virtualised interrupt controller). So maybe we should be setting
> nr_pirqs to 0 on ARM. I appreciate you likely want such a patch to come
> from an ARM person, so I'm fine with you making this NR_IRQS in the
> meantime.
As we already know that PIRQ is not used on ARM, it would make sense to
use directly in this patch 0.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-12-05 14:37 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-05 13:51 [PATCH] have architectures specify the number of PIRQs a hardware domain gets Jan Beulich
2014-12-05 14:27 ` Ian Campbell
2014-12-05 14:36 ` Julien Grall [this message]
2014-12-05 14:42 ` Ian Campbell
2014-12-05 15:25 ` Julien Grall
2014-12-05 15:42 ` Jan Beulich
2014-12-05 16:05 ` Julien Grall
2014-12-05 16:23 ` Jan Beulich
2014-12-05 16:34 ` Stefano Stabellini
2014-12-05 14:48 ` Jan Beulich
2014-12-05 14:51 ` Ian Campbell
2014-12-11 12:07 ` Ian Campbell
2014-12-11 13:16 ` Jan Beulich
2014-12-05 14:48 ` David Vrabel
2014-12-05 14:54 ` Jan Beulich
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