From: Julien Grall <julien.grall@linaro.org>
To: manish jaggi <manishjaggi.oss@gmail.com>,
xen-devel <xen-devel@lists.xen.org>,
Stefano Stabellini <stefano.stabellini@eu.citrix.com>,
manish.jaggi@caviumnetworks.com, Vijaya.Kumar@caviumnetworks.com
Subject: Re: [query] gic_update_one_lr r/w from ICH_LR rather than vcpu context lr
Date: Tue, 23 Dec 2014 14:54:49 +0100 [thread overview]
Message-ID: <54997429.2090603@linaro.org> (raw)
In-Reply-To: <CAAiw7JnT_s=eS5dR8xvUKChxox8BcQpzuFpsPtJo5YRegFAKBg@mail.gmail.com>
Hi,
On 23/12/2014 04:43, manish jaggi wrote:
> In gic.c, gic_update_one_lr, gic_hw_ops is called to read and write to an LR.
The function gic_update_one_lr is only used to update the LRs of the
current vCPU.
> why is read/write not done on the LRs stored in the vcpu context ?
The LR array in the vCPU context is only used when to save/restore the
state of the vGIC vCPU.
When the vCPU is not sync, the state of this LRs is invalid. Think about
the vCPU running on another pCPU.
Regards,
--
Julien Grall
prev parent reply other threads:[~2014-12-23 13:54 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-23 3:43 [query] gic_update_one_lr r/w from ICH_LR rather than vcpu context lr manish jaggi
2014-12-23 13:54 ` Julien Grall [this message]
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