* [query] gic_update_one_lr r/w from ICH_LR rather than vcpu context lr
@ 2014-12-23 3:43 manish jaggi
2014-12-23 13:54 ` Julien Grall
0 siblings, 1 reply; 2+ messages in thread
From: manish jaggi @ 2014-12-23 3:43 UTC (permalink / raw)
To: xen-devel, Stefano Stabellini, manish.jaggi, Vijaya.Kumar
Hi Stefano,
In gic.c, gic_update_one_lr, gic_hw_ops is called to read and write to an LR.
why is read/write not done on the LRs stored in the vcpu context ?
Could you please elaborate why it is done this way.
-Regards
manish
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [query] gic_update_one_lr r/w from ICH_LR rather than vcpu context lr
2014-12-23 3:43 [query] gic_update_one_lr r/w from ICH_LR rather than vcpu context lr manish jaggi
@ 2014-12-23 13:54 ` Julien Grall
0 siblings, 0 replies; 2+ messages in thread
From: Julien Grall @ 2014-12-23 13:54 UTC (permalink / raw)
To: manish jaggi, xen-devel, Stefano Stabellini, manish.jaggi,
Vijaya.Kumar
Hi,
On 23/12/2014 04:43, manish jaggi wrote:
> In gic.c, gic_update_one_lr, gic_hw_ops is called to read and write to an LR.
The function gic_update_one_lr is only used to update the LRs of the
current vCPU.
> why is read/write not done on the LRs stored in the vcpu context ?
The LR array in the vCPU context is only used when to save/restore the
state of the vGIC vCPU.
When the vCPU is not sync, the state of this LRs is invalid. Think about
the vCPU running on another pCPU.
Regards,
--
Julien Grall
^ permalink raw reply [flat|nested] 2+ messages in thread
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2014-12-23 3:43 [query] gic_update_one_lr r/w from ICH_LR rather than vcpu context lr manish jaggi
2014-12-23 13:54 ` Julien Grall
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