From: Markos Chandras <Markos.Chandras@imgtec.com>
To: <linux-mips@linux-mips.org>
Subject: Re: [PATCH 2/3] MIPS: HTW: Prevent accidental HTW start due to nested htw_{start,stop}
Date: Mon, 26 Jan 2015 12:03:44 +0000 [thread overview]
Message-ID: <54C62D20.5010902@imgtec.com> (raw)
In-Reply-To: <54C62941.6060604@imgtec.com>
On 01/26/2015 11:47 AM, Markos Chandras wrote:
> On 01/26/2015 11:36 AM, James Hogan wrote:
>
>>
>>> + raw_current_cpu_data.htw_seq++; \
>>
>> not "if (!raw_current_cpu_data.htw_seq++)) {"?
> Why?
>
> on _stop() calls you just increment it. The _start() will do the right
> thing then.
>
> I think what you suggest it to move the if() condition from the _start()
> to _stop().
>
>>
>>> write_c0_pwctl(read_c0_pwctl() & \
>>> ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
>>> back_to_back_c0_hazard(); \
>>> + local_irq_restore(flags); \
>>> } \
>>> } while(0)
>>>
>>> #define htw_start() \
>>> do { \
>>> + unsigned long flags; \
>>> + \
>>> if (cpu_has_htw) { \
>>> - write_c0_pwctl(read_c0_pwctl() | \
>>> - (1 << MIPS_PWCTL_PWEN_SHIFT)); \
>>> - back_to_back_c0_hazard(); \
>>> + local_irq_save(flags); \
>>> + if (!--raw_current_cpu_data.htw_seq) { \
>>> + write_c0_pwctl(read_c0_pwctl() | \
>>> + (1 << MIPS_PWCTL_PWEN_SHIFT)); \
>>> + back_to_back_c0_hazard(); \
>>> + } \
>>> + local_irq_restore(flags); \
>>> } \
>>> } while(0)
>>>
>>> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
>>> index dc49cf30c2db..5d6e59f20750 100644
>>> --- a/arch/mips/kernel/cpu-probe.c
>>> +++ b/arch/mips/kernel/cpu-probe.c
>>> @@ -367,8 +367,10 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
>>> if (config3 & MIPS_CONF3_MSA)
>>> c->ases |= MIPS_ASE_MSA;
>>> /* Only tested on 32-bit cores */
>>> - if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT))
>>> + if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT)) {
>>> + c->htw_seq = 0;
>>
>> is that necessary, since cpu_data[] is global?
>
> I checked and it is not placed in the .data instead of .bss section so i
> was not sure if it is initialized properly.
>
sorry i meant it's placed in ".data" instead of ".bss" section.
--
markos
WARNING: multiple messages have this Message-ID (diff)
From: Markos Chandras <Markos.Chandras@imgtec.com>
To: linux-mips@linux-mips.org
Subject: Re: [PATCH 2/3] MIPS: HTW: Prevent accidental HTW start due to nested htw_{start,stop}
Date: Mon, 26 Jan 2015 12:03:44 +0000 [thread overview]
Message-ID: <54C62D20.5010902@imgtec.com> (raw)
Message-ID: <20150126120344.tl42TSU1NiQApJ2PI71eUGLGArN0t1l8_-FQN-KK8PI@z> (raw)
In-Reply-To: <54C62941.6060604@imgtec.com>
On 01/26/2015 11:47 AM, Markos Chandras wrote:
> On 01/26/2015 11:36 AM, James Hogan wrote:
>
>>
>>> + raw_current_cpu_data.htw_seq++; \
>>
>> not "if (!raw_current_cpu_data.htw_seq++)) {"?
> Why?
>
> on _stop() calls you just increment it. The _start() will do the right
> thing then.
>
> I think what you suggest it to move the if() condition from the _start()
> to _stop().
>
>>
>>> write_c0_pwctl(read_c0_pwctl() & \
>>> ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
>>> back_to_back_c0_hazard(); \
>>> + local_irq_restore(flags); \
>>> } \
>>> } while(0)
>>>
>>> #define htw_start() \
>>> do { \
>>> + unsigned long flags; \
>>> + \
>>> if (cpu_has_htw) { \
>>> - write_c0_pwctl(read_c0_pwctl() | \
>>> - (1 << MIPS_PWCTL_PWEN_SHIFT)); \
>>> - back_to_back_c0_hazard(); \
>>> + local_irq_save(flags); \
>>> + if (!--raw_current_cpu_data.htw_seq) { \
>>> + write_c0_pwctl(read_c0_pwctl() | \
>>> + (1 << MIPS_PWCTL_PWEN_SHIFT)); \
>>> + back_to_back_c0_hazard(); \
>>> + } \
>>> + local_irq_restore(flags); \
>>> } \
>>> } while(0)
>>>
>>> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
>>> index dc49cf30c2db..5d6e59f20750 100644
>>> --- a/arch/mips/kernel/cpu-probe.c
>>> +++ b/arch/mips/kernel/cpu-probe.c
>>> @@ -367,8 +367,10 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
>>> if (config3 & MIPS_CONF3_MSA)
>>> c->ases |= MIPS_ASE_MSA;
>>> /* Only tested on 32-bit cores */
>>> - if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT))
>>> + if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT)) {
>>> + c->htw_seq = 0;
>>
>> is that necessary, since cpu_data[] is global?
>
> I checked and it is not placed in the .data instead of .bss section so i
> was not sure if it is initialized properly.
>
sorry i meant it's placed in ".data" instead of ".bss" section.
--
markos
next prev parent reply other threads:[~2015-01-26 12:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-26 9:40 [PATCH 0/3 3.19] HTW fixes Markos Chandras
2015-01-26 9:40 ` Markos Chandras
2015-01-26 9:40 ` [PATCH 1/3] MIPS: asm: pgtable: Add c0 hazards on HTW start/stop sequences Markos Chandras
2015-01-26 9:40 ` Markos Chandras
2015-01-26 9:40 ` [PATCH 2/3] MIPS: HTW: Prevent accidental HTW start due to nested htw_{start,stop} Markos Chandras
2015-01-26 9:40 ` Markos Chandras
2015-01-26 11:36 ` James Hogan
2015-01-26 11:36 ` James Hogan
2015-01-26 11:38 ` James Hogan
2015-01-26 11:38 ` James Hogan
2015-01-26 11:47 ` Markos Chandras
2015-01-26 11:47 ` Markos Chandras
2015-01-26 12:03 ` Markos Chandras [this message]
2015-01-26 12:03 ` Markos Chandras
2015-01-26 12:03 ` James Hogan
2015-01-26 12:03 ` James Hogan
2015-01-26 12:04 ` Markos Chandras
2015-01-26 12:04 ` Markos Chandras
2015-01-26 13:04 ` [PATCH v2 " Markos Chandras
2015-01-26 13:04 ` Markos Chandras
2015-01-26 9:40 ` [PATCH 3/3] MIPS: asm: pgtable: Prevent HTW race when updating PTEs Markos Chandras
2015-01-26 9:40 ` Markos Chandras
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