From: Andrew Cooper <andrew.cooper3@citrix.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
Kai Huang <kai.huang@linux.intel.com>,
"jbeulich@suse.com" <jbeulich@suse.com>,
"tim@xen.org" <tim@xen.org>, "keir@xen.org" <keir@xen.org>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: PML (Page Modification Logging) design for Xen
Date: Thu, 12 Feb 2015 14:10:02 +0000 [thread overview]
Message-ID: <54DCB43A.7080609@citrix.com> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D12618F6DD@SHSMSX101.ccr.corp.intel.com>
On 12/02/15 06:54, Tian, Kevin wrote:
>
>>> which presumably
>>> means that the PML buffer flush needs to be aware of which gfns are
>>> mapped by superpages to be able to correctly set a block of bits in the
>>> logdirty bitmap.
>>>
>> Unfortunately PML itself can't tell us if the logged GPA comes from
>> superpage or not, but even in PML we still need to split superpages to
>> 4K page, just like traditional write protection approach does. I think
>> this is because live migration should be based on 4K page granularity.
>> Marking all 512 bits of a 2M page to be dirty by a single write doesn't
>> make sense in both write protection and PML cases.
>>
> agree. extending one write to superpage enlarges dirty set unnecessary.
> since spec doesn't say superpage logging is not supported, I'd think a
> 4k-aligned entry being logged if within superpage.
The spec states that an gfn is appended to the log strictly on the
transition of the D bit from 0 to 1.
In the case of a 2M superpage, there is a single D bit for the entire 2M
range.
The plausible (working) scenarios I can see are:
1) superpages are not supported (not indicated by the whitepaper).
2) a single entry will be written which must be taken to cover the
entire 2M range.
3) an individual entry is written for every access.
Have I missed anything?
~Andrew
next prev parent reply other threads:[~2015-02-12 14:10 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-11 8:28 PML (Page Modification Logging) design for Xen Kai Huang
2015-02-11 11:52 ` Andrew Cooper
2015-02-11 13:13 ` Jan Beulich
2015-02-11 16:33 ` Andrew Cooper
2015-02-11 16:55 ` Jan Beulich
2015-02-12 2:35 ` Kai Huang
2015-02-12 6:25 ` Tian, Kevin
2015-02-12 6:45 ` Kai Huang
2015-02-12 7:08 ` Tian, Kevin
2015-02-12 7:34 ` Kai Huang
2015-02-12 12:42 ` Tim Deegan
2015-02-13 2:15 ` Kai Huang
2015-02-13 2:28 ` Tian, Kevin
2015-02-17 10:40 ` Jan Beulich
2015-02-12 2:39 ` Kai Huang
2015-02-12 6:54 ` Tian, Kevin
2015-02-12 6:56 ` Kai Huang
2015-02-12 7:09 ` Tian, Kevin
2015-02-12 7:15 ` Kai Huang
2015-02-12 14:10 ` Andrew Cooper [this message]
2015-02-13 0:58 ` Bing
2015-02-13 2:11 ` Kai Huang
2015-02-13 10:57 ` Andrew Cooper
2015-02-13 14:32 ` Kai Huang
2015-02-13 15:28 ` Andrew Cooper
2015-02-13 15:52 ` Kai Huang
2015-02-14 3:01 ` Kai Huang
2015-02-16 11:44 ` Andrew Cooper
2015-02-16 14:02 ` Kai Huang
2015-02-17 10:37 ` Jan Beulich
2015-02-17 10:19 ` Jan Beulich
2015-02-17 11:57 ` Tim Deegan
2015-03-11 10:59 ` George Dunlap
2015-03-11 11:11 ` Andrew Cooper
2015-03-11 15:53 ` George Dunlap
2015-03-12 7:36 ` Kai Huang
2015-03-12 11:19 ` Andrew Cooper
2015-03-14 3:04 ` Kai Huang
2015-03-24 6:42 ` Kai Huang
2015-03-24 7:53 ` Jan Beulich
2015-03-24 8:06 ` Kai Huang
2015-03-24 8:14 ` Jan Beulich
2015-03-24 8:17 ` Kai Huang
2015-02-11 13:06 ` Jan Beulich
2015-02-12 2:49 ` Kai Huang
2015-02-12 5:16 ` Kai Huang
2015-02-12 7:02 ` Tian, Kevin
2015-02-12 7:04 ` Kai Huang
2015-02-17 10:23 ` Jan Beulich
2015-03-01 23:13 ` Kai Huang
2015-02-12 12:34 ` Tim Deegan
2015-02-13 2:50 ` Kai Huang
2015-02-16 14:01 ` Kai Huang
2015-02-16 18:19 ` Tim Deegan
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