Re: [Qemu-devel] [PATCH] target-tilegx: Finish decoding the first TB block.

[Chen Gang S <gang.chen@sunrus.com.cn>]

On 2/22/15 08:25, Chris Metcalf wrote:
> On 2/21/2015 7:25 PM, Chen Gang S wrote:
>> On 2/22/15 00:33, Richard Henderson wrote:
>>> >On 02/21/2015 07:31 AM, Chen Gang S wrote:
>>>> >>
>>>> >>  - We can still use the original pipes order: "y0, y2, y1" and "x0, x1".
>>> >
>>> >I guess, sure, though I don't think that'll help as much as you imagine.
>>> >
>>>
>> OK, thanks. For me, your idea is OK, it is more simpler (although with
>> more tcg temporary variables).
> 
> Richard pretty much said all I wanted to say, but I just wanted to reinforce
> that the semantics of the multiple pipes is always "all together".

OK, thanks.

>                                                                    So if you have
> { move r1, r2; move r2, r1 } then that swaps r1 and r2.

So the first pipe must have temporary variable.

>                                                          Or if you have
> { ld r1, sp; jrp r1 } then you are restoring r1 but jumping to wherever its
> previous value said you needed to go.  Etc.
 
Excuse me, I am not quite sure whether ld/st can be in pipe x0, y0, or
y1.

But I guess your meaning is that y2 must have temporary variable, or it
will cause issue.

> Similarly, if any pipeline takes an exception (a TLB fault from a memory op,
> a GPV fault from an illegal mfspr, etc) then no pipeline completes its action.
> 

Oh, really !! And I guess, Richard's code can not be sure of it: memory
write operand (e.g st) is not buffered. If what I guess is correct, for
me, it is not quite easy to fix this issue.

I also guess, at present, we need think of more before continue.

Thanks.
-- 
Chen Gang

Open, share, and attitude like air, water, and life which God blessed