From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 4/5] irqchip: gicv3-its: define macros for GITS_CTLR fields
Date: Thu, 05 Mar 2015 11:59:48 +0000 [thread overview]
Message-ID: <54F84534.3000900@arm.com> (raw)
In-Reply-To: <1425439098-10708-5-git-send-email-wuyun.wu@huawei.com>
On 04/03/15 03:18, Yun Wu wrote:
> Define macros for GITS_CTLR fields to avoid using magic numbers.
>
> Signed-off-by: Yun Wu <wuyun.wu@huawei.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
M.
> ---
> drivers/irqchip/irq-gic-v3-its.c | 2 +-
> include/linux/irqchip/arm-gic-v3.h | 3 +++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index e8bda0b..d13c24e 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -1388,7 +1388,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
> writeq_relaxed(baser, its->base + GITS_CBASER);
> tmp = readq_relaxed(its->base + GITS_CBASER);
> writeq_relaxed(0, its->base + GITS_CWRITER);
> - writel_relaxed(1, its->base + GITS_CTLR);
> + writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
>
> if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) {
> pr_info("ITS: using cache flushing for cmd queue\n");
> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
> index 3459b43..c9d3002 100644
> --- a/include/linux/irqchip/arm-gic-v3.h
> +++ b/include/linux/irqchip/arm-gic-v3.h
> @@ -134,6 +134,9 @@
>
> #define GITS_TRANSLATER 0x10040
>
> +#define GITS_CTLR_ENABLE (1U << 0)
> +#define GITS_CTLR_QUIESCENT (1U << 31)
> +
> #define GITS_TYPER_DEVBITS_SHIFT 13
> #define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)
> #define GITS_TYPER_PTA (1UL << 19)
> --
> 1.8.0
>
>
>
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Yun Wu <wuyun.wu@huawei.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"jason@lakedaemon.net" <jason@lakedaemon.net>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v3 4/5] irqchip: gicv3-its: define macros for GITS_CTLR fields
Date: Thu, 05 Mar 2015 11:59:48 +0000 [thread overview]
Message-ID: <54F84534.3000900@arm.com> (raw)
In-Reply-To: <1425439098-10708-5-git-send-email-wuyun.wu@huawei.com>
On 04/03/15 03:18, Yun Wu wrote:
> Define macros for GITS_CTLR fields to avoid using magic numbers.
>
> Signed-off-by: Yun Wu <wuyun.wu@huawei.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
M.
> ---
> drivers/irqchip/irq-gic-v3-its.c | 2 +-
> include/linux/irqchip/arm-gic-v3.h | 3 +++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index e8bda0b..d13c24e 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -1388,7 +1388,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
> writeq_relaxed(baser, its->base + GITS_CBASER);
> tmp = readq_relaxed(its->base + GITS_CBASER);
> writeq_relaxed(0, its->base + GITS_CWRITER);
> - writel_relaxed(1, its->base + GITS_CTLR);
> + writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
>
> if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) {
> pr_info("ITS: using cache flushing for cmd queue\n");
> diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
> index 3459b43..c9d3002 100644
> --- a/include/linux/irqchip/arm-gic-v3.h
> +++ b/include/linux/irqchip/arm-gic-v3.h
> @@ -134,6 +134,9 @@
>
> #define GITS_TRANSLATER 0x10040
>
> +#define GITS_CTLR_ENABLE (1U << 0)
> +#define GITS_CTLR_QUIESCENT (1U << 31)
> +
> #define GITS_TYPER_DEVBITS_SHIFT 13
> #define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)
> #define GITS_TYPER_PTA (1UL << 19)
> --
> 1.8.0
>
>
>
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-03-05 11:59 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-04 3:18 [PATCH v3 0/5] enhance configuring an ITS Yun Wu
2015-03-04 3:18 ` Yun Wu
2015-03-04 3:18 ` [PATCH v3 1/5] irqchip: gicv3-its: zero itt before handling to hardware Yun Wu
2015-03-04 3:18 ` Yun Wu
2015-03-04 3:18 ` [PATCH v3 2/5] irqchip: gicv3-its: use 64KB page as default granule Yun Wu
2015-03-04 3:18 ` Yun Wu
2015-03-04 3:18 ` [PATCH v3 3/5] irqchip: gicv3-its: add limitation to page order Yun Wu
2015-03-04 3:18 ` Yun Wu
2015-03-05 11:22 ` Marc Zyngier
2015-03-05 11:22 ` Marc Zyngier
2015-03-04 3:18 ` [PATCH v3 4/5] irqchip: gicv3-its: define macros for GITS_CTLR fields Yun Wu
2015-03-04 3:18 ` Yun Wu
2015-03-05 11:59 ` Marc Zyngier [this message]
2015-03-05 11:59 ` Marc Zyngier
2015-03-04 3:18 ` [PATCH v3 5/5] irqchip: gicv3-its: support safe initialization Yun Wu
2015-03-04 3:18 ` Yun Wu
2015-03-05 12:05 ` Marc Zyngier
2015-03-05 12:05 ` Marc Zyngier
2015-03-06 1:34 ` Yun Wu (Abel)
2015-03-06 1:34 ` Yun Wu (Abel)
2015-03-05 12:12 ` [PATCH v3 0/5] enhance configuring an ITS Marc Zyngier
2015-03-05 12:12 ` Marc Zyngier
2015-03-06 1:36 ` Yun Wu (Abel)
2015-03-06 1:36 ` Yun Wu (Abel)
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