From: monstr@monstr.eu (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC
Date: Thu, 05 Mar 2015 15:27:47 +0100 [thread overview]
Message-ID: <54F867E3.6070706@monstr.eu> (raw)
In-Reply-To: <54F862BE.7000901@arm.com>
Hi Marc,
On 03/05/2015 03:05 PM, Marc Zyngier wrote:
> Hi Michal,
>
> On 05/03/15 13:53, Michal Simek wrote:
>> Initial version of device tree for Xilinx ZynqMP SoC.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> Acked-by: S?ren Brinkmann <soren.brinkmann@xilinx.com>
>> ---
>>
>> Changes in v2:
>> - move timer out of amba_apu bus because it is not on bus
>> Reported by Mark
>> - FIC GICC and GICV addresses - Reported by Rob
>> - Fix copyright
>> - Enable cadence IP in defconfig
>> - Add support for macb multiqueue
>>
>> arch/arm64/Kconfig | 5 +
>> arch/arm64/boot/dts/Makefile | 1 +
>> arch/arm64/boot/dts/xilinx/Makefile | 5 +
>> arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 47 +++++
>> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 303 ++++++++++++++++++++++++++++
>> arch/arm64/configs/defconfig | 3 +
>> 6 files changed, 364 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/xilinx/Makefile
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>
> [...]
>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
>> new file mode 100644
>> index 000000000000..0a3f40ecd06d
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
>
> [...]
>
>> + gic: interrupt-controller at f9010000 {
>> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + #interrupt-cells = <3>;
>> + reg = <0x0 0xf9010000 0x10000>,
>> + <0x0 0xf902f000 0x2000>,
>> + <0x0 0xf9040000 0x20000>,
>> + <0x0 0xf906f000 0x2000>;
>> + interrupt-controller;
>
> Please add the missing GIC maintenance interrupt.
Ok. Will add interrupts = <1 9 0xf04>;
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <monstr@monstr.eu>
To: Marc Zyngier <marc.zyngier@arm.com>,
Michal Simek <michal.simek@xilinx.com>,
linux-arm-kernel@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>,
Rob Herring <robherring2@gmail.com>
Cc: devicetree@vger.kernel.org, "Zach Pfeffer" <zachp@xilinx.com>,
"Pawel Moll" <pawel.moll@arm.com>,
"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
"Catalin Marinas" <catalin.marinas@arm.com>,
"Mark Brown" <broonie@linaro.org>,
"Will Deacon" <will.deacon@arm.com>,
linux-kernel@vger.kernel.org,
"Robert Richter" <rrichter@cavium.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Kumar Gala" <galak@codeaurora.org>,
"Eddie Huang" <eddie.huang@mediatek.com>,
"Sören Brinkmann" <soren.brinkmann@xilinx.com>
Subject: Re: [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC
Date: Thu, 05 Mar 2015 15:27:47 +0100 [thread overview]
Message-ID: <54F867E3.6070706@monstr.eu> (raw)
In-Reply-To: <54F862BE.7000901@arm.com>
[-- Attachment #1: Type: text/plain, Size: 2203 bytes --]
Hi Marc,
On 03/05/2015 03:05 PM, Marc Zyngier wrote:
> Hi Michal,
>
> On 05/03/15 13:53, Michal Simek wrote:
>> Initial version of device tree for Xilinx ZynqMP SoC.
>>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>> Acked-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
>> ---
>>
>> Changes in v2:
>> - move timer out of amba_apu bus because it is not on bus
>> Reported by Mark
>> - FIC GICC and GICV addresses - Reported by Rob
>> - Fix copyright
>> - Enable cadence IP in defconfig
>> - Add support for macb multiqueue
>>
>> arch/arm64/Kconfig | 5 +
>> arch/arm64/boot/dts/Makefile | 1 +
>> arch/arm64/boot/dts/xilinx/Makefile | 5 +
>> arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 47 +++++
>> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 303 ++++++++++++++++++++++++++++
>> arch/arm64/configs/defconfig | 3 +
>> 6 files changed, 364 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/xilinx/Makefile
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
>> create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp.dtsi
>
> [...]
>
>> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
>> new file mode 100644
>> index 000000000000..0a3f40ecd06d
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
>
> [...]
>
>> + gic: interrupt-controller@f9010000 {
>> + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
>> + #interrupt-cells = <3>;
>> + reg = <0x0 0xf9010000 0x10000>,
>> + <0x0 0xf902f000 0x2000>,
>> + <0x0 0xf9040000 0x20000>,
>> + <0x0 0xf906f000 0x2000>;
>> + interrupt-controller;
>
> Please add the missing GIC maintenance interrupt.
Ok. Will add interrupts = <1 9 0xf04>;
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 198 bytes --]
next prev parent reply other threads:[~2015-03-05 14:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-05 13:53 [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC Michal Simek
2015-03-05 13:53 ` Michal Simek
2015-03-05 14:03 ` Thomas Petazzoni
2015-03-05 14:03 ` Thomas Petazzoni
2015-03-05 14:08 ` Michal Simek
2015-03-05 14:08 ` Michal Simek
2015-03-05 14:05 ` Marc Zyngier
2015-03-05 14:05 ` Marc Zyngier
2015-03-05 14:05 ` Marc Zyngier
2015-03-05 14:27 ` Michal Simek [this message]
2015-03-05 14:27 ` Michal Simek
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