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* [PATCH 00/12] Tessellation support for nvc0
@ 2015-05-17  5:07 Ilia Mirkin
  2015-05-17  5:07 ` [PATCH 04/12] nvc0: TESSCOORD comes in as a sysval, not an input Ilia Mirkin
                   ` (3 more replies)
  0 siblings, 4 replies; 15+ messages in thread
From: Ilia Mirkin @ 2015-05-17  5:07 UTC (permalink / raw)
  To: mesa-dev-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
  Cc: nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

This is enough to enable tessellation support on nvc0. It seems to
work a lot better on my GF108 than GK208. I suspect that there's some
sort of scheduling shenanigans that need to be adjusted for
kepler+. Or perhaps some shader header things.

Even with the GF108, I still get occasional blue triangles in Heaven,
but I get a *ton* of them on the GK208 -- seemingly the same issue,
but it's much worse on there.

Also there's about a 100% chance that gl_PrimitiveID doesn't work.

In any case, I plan on pushing this semi-soon unless there are any
loud objections. I don't think it's going to do too much good sitting
in my tree, or too much evil sitting upstream while core + st/mesa are
worked out.

Ilia Mirkin (12):
  nvc0: preliminary tess support
  nvc0: add support for setting patch vertices at draw time
  nvc0: add handling for set_tess_state callback
  nvc0: TESSCOORD comes in as a sysval, not an input
  nvc0/ir: mark varyings as per-patch based on semantic name
  nv50/ir: populate info structure based on new tess properties
  nv50/ir: set perPatch flag on load/stores to per-patch varyings
  nv50/ir: add support for reading outputs in tess control shaders
  nvc0/ir: patch vertex count is stored in the upper bits
  nvc0/ir: handle loads from outputs in control shaders
  nvc0/ir: allow tess eval output loads to be CSE'd
  nv50/ir: cleanup private enums that have graduated to gallium

 src/gallium/drivers/nouveau/codegen/nv50_ir.cpp    |  4 +-
 .../drivers/nouveau/codegen/nv50_ir_driver.h       | 12 ----
 .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp  | 56 +++++++++++++++--
 .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp      |  7 +++
 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   |  2 +
 src/gallium/drivers/nouveau/nvc0/nvc0_context.h    |  8 ++-
 src/gallium/drivers/nouveau/nvc0/nvc0_program.c    | 56 +++++++----------
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.c     |  7 +--
 src/gallium/drivers/nouveau/nvc0/nvc0_screen.h     |  1 +
 .../drivers/nouveau/nvc0/nvc0_shader_state.c       |  3 -
 src/gallium/drivers/nouveau/nvc0/nvc0_state.c      | 71 ++++++++++++++++++++++
 .../drivers/nouveau/nvc0/nvc0_state_validate.c     | 11 ++++
 src/gallium/drivers/nouveau/nvc0/nvc0_tex.c        | 34 +++++------
 src/gallium/drivers/nouveau/nvc0/nvc0_vbo.c        |  9 ++-
 .../drivers/nouveau/nvc0/nvc0_vbo_translate.c      |  3 +-
 15 files changed, 200 insertions(+), 84 deletions(-)

-- 
2.3.6

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^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2015-05-17 14:15 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-05-17  5:07 [PATCH 00/12] Tessellation support for nvc0 Ilia Mirkin
2015-05-17  5:07 ` [PATCH 04/12] nvc0: TESSCOORD comes in as a sysval, not an input Ilia Mirkin
2015-05-17  5:07 ` [PATCH 06/12] nv50/ir: populate info structure based on new tess properties Ilia Mirkin
2015-05-17  5:07 ` [PATCH 07/12] nv50/ir: set perPatch flag on load/stores to per-patch varyings Ilia Mirkin
     [not found] ` <1431839235-10256-1-git-send-email-imirkin-FrUbXkNCsVf2fBVCVOL8/A@public.gmane.org>
2015-05-17  5:07   ` [PATCH 01/12] nvc0: preliminary tess support Ilia Mirkin
2015-05-17  5:07   ` [PATCH 02/12] nvc0: add support for setting patch vertices at draw time Ilia Mirkin
2015-05-17  5:18     ` Ilia Mirkin
2015-05-17  5:07   ` [PATCH 03/12] nvc0: add handling for set_tess_state callback Ilia Mirkin
2015-05-17  5:07   ` [PATCH 05/12] nvc0/ir: mark varyings as per-patch based on semantic name Ilia Mirkin
2015-05-17  5:07   ` [PATCH 08/12] nv50/ir: add support for reading outputs in tess control shaders Ilia Mirkin
2015-05-17  5:07   ` [PATCH 09/12] nvc0/ir: patch vertex count is stored in the upper bits Ilia Mirkin
2015-05-17  5:07   ` [PATCH 10/12] nvc0/ir: handle loads from outputs in control shaders Ilia Mirkin
2015-05-17  5:07   ` [PATCH 11/12] nvc0/ir: allow tess eval output loads to be CSE'd Ilia Mirkin
2015-05-17  5:07   ` [PATCH 12/12] nv50/ir: cleanup private enums that have graduated to gallium Ilia Mirkin
2015-05-17 14:15   ` [Mesa-dev] [PATCH 00/12] Tessellation support for nvc0 Tobias Klausmann

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