* [PATCH] xen: arm: Do not expose PMU to domain 0
@ 2015-06-04 16:49 Ian Campbell
2015-06-05 10:17 ` Julien Grall
0 siblings, 1 reply; 5+ messages in thread
From: Ian Campbell @ 2015-06-04 16:49 UTC (permalink / raw)
To: xen-devel; +Cc: julien.grall, tim, Ian Campbell, stefano.stabellini
It uses a PPI which we cannot route to a guest, and will surely need
more support than just that anyway.
I noticed this on Mustang with UEFI where the built in DTB contains a
node of this type.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/arch/arm/domain_build.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 1e545fe..8e87315 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -1105,6 +1105,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
DT_MATCH_COMPATIBLE("multiboot,module"),
DT_MATCH_COMPATIBLE("arm,psci"),
DT_MATCH_COMPATIBLE("arm,psci-0.2"),
+ DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
DT_MATCH_PATH("/cpus"),
DT_MATCH_TYPE("memory"),
/* The memory mapped timer is not supported by Xen. */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: Do not expose PMU to domain 0
2015-06-04 16:49 [PATCH] xen: arm: Do not expose PMU to domain 0 Ian Campbell
@ 2015-06-05 10:17 ` Julien Grall
2015-06-05 10:25 ` Ian Campbell
0 siblings, 1 reply; 5+ messages in thread
From: Julien Grall @ 2015-06-05 10:17 UTC (permalink / raw)
To: Ian Campbell, xen-devel; +Cc: julien.grall, tim, stefano.stabellini
Hi Ian,
On 04/06/2015 17:49, Ian Campbell wrote:
> It uses a PPI which we cannot route to a guest, and will surely need
> more support than just that anyway.
>
> I noticed this on Mustang with UEFI where the built in DTB contains a
> node of this type.
>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> ---
> xen/arch/arm/domain_build.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> index 1e545fe..8e87315 100644
> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -1105,6 +1105,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
> DT_MATCH_COMPATIBLE("multiboot,module"),
> DT_MATCH_COMPATIBLE("arm,psci"),
> DT_MATCH_COMPATIBLE("arm,psci-0.2"),
> + DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
Will you are here, can you blacklist at list "arm,cortex-a15-pmu" and
"arm,cortex-a7-pmu"?
I suspect we would have the same problem with them.
Regards,
--
Julien Grall
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: Do not expose PMU to domain 0
2015-06-05 10:17 ` Julien Grall
@ 2015-06-05 10:25 ` Ian Campbell
2015-06-05 11:20 ` Julien Grall
0 siblings, 1 reply; 5+ messages in thread
From: Ian Campbell @ 2015-06-05 10:25 UTC (permalink / raw)
To: Julien Grall; +Cc: stefano.stabellini, tim, xen-devel
On Fri, 2015-06-05 at 11:17 +0100, Julien Grall wrote:
> Hi Ian,
>
> On 04/06/2015 17:49, Ian Campbell wrote:
> > It uses a PPI which we cannot route to a guest, and will surely need
> > more support than just that anyway.
> >
> > I noticed this on Mustang with UEFI where the built in DTB contains a
> > node of this type.
> >
> > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> > ---
> > xen/arch/arm/domain_build.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> > index 1e545fe..8e87315 100644
> > --- a/xen/arch/arm/domain_build.c
> > +++ b/xen/arch/arm/domain_build.c
> > @@ -1105,6 +1105,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
> > DT_MATCH_COMPATIBLE("multiboot,module"),
> > DT_MATCH_COMPATIBLE("arm,psci"),
> > DT_MATCH_COMPATIBLE("arm,psci-0.2"),
> > + DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
>
> Will you are here, can you blacklist at list "arm,cortex-a15-pmu" and
> "arm,cortex-a7-pmu"?
>
> I suspect we would have the same problem with them.
Suspect, or know?
Ian.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: Do not expose PMU to domain 0
2015-06-05 10:25 ` Ian Campbell
@ 2015-06-05 11:20 ` Julien Grall
2015-06-05 11:39 ` Ian Campbell
0 siblings, 1 reply; 5+ messages in thread
From: Julien Grall @ 2015-06-05 11:20 UTC (permalink / raw)
To: Ian Campbell, Julien Grall; +Cc: xen-devel, tim, stefano.stabellini
On 05/06/15 11:25, Ian Campbell wrote:
> On Fri, 2015-06-05 at 11:17 +0100, Julien Grall wrote:
>> Hi Ian,
>>
>> On 04/06/2015 17:49, Ian Campbell wrote:
>>> It uses a PPI which we cannot route to a guest, and will surely need
>>> more support than just that anyway.
>>>
>>> I noticed this on Mustang with UEFI where the built in DTB contains a
>>> node of this type.
>>>
>>> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
>>> ---
>>> xen/arch/arm/domain_build.c | 1 +
>>> 1 file changed, 1 insertion(+)
>>>
>>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
>>> index 1e545fe..8e87315 100644
>>> --- a/xen/arch/arm/domain_build.c
>>> +++ b/xen/arch/arm/domain_build.c
>>> @@ -1105,6 +1105,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
>>> DT_MATCH_COMPATIBLE("multiboot,module"),
>>> DT_MATCH_COMPATIBLE("arm,psci"),
>>> DT_MATCH_COMPATIBLE("arm,psci-0.2"),
>>> + DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
>>
>> Will you are here, can you blacklist at list "arm,cortex-a15-pmu" and
>> "arm,cortex-a7-pmu"?
>>
>> I suspect we would have the same problem with them.
>
> Suspect, or know?
It's based on the documentation
(Documentation/devicetree/bindings/arm/pmu.txt):
"- interrupts : 1 combined interrupt or 1 per core. If the interrupt is
a per-cpu
interrupt (PPI) then 1 interrupt should be specified.
"
Regards,
--
Julien Grall
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: Do not expose PMU to domain 0
2015-06-05 11:20 ` Julien Grall
@ 2015-06-05 11:39 ` Ian Campbell
0 siblings, 0 replies; 5+ messages in thread
From: Ian Campbell @ 2015-06-05 11:39 UTC (permalink / raw)
To: Julien Grall; +Cc: xen-devel, tim, stefano.stabellini
On Fri, 2015-06-05 at 12:20 +0100, Julien Grall wrote:
> On 05/06/15 11:25, Ian Campbell wrote:
> > On Fri, 2015-06-05 at 11:17 +0100, Julien Grall wrote:
> >> Hi Ian,
> >>
> >> On 04/06/2015 17:49, Ian Campbell wrote:
> >>> It uses a PPI which we cannot route to a guest, and will surely need
> >>> more support than just that anyway.
> >>>
> >>> I noticed this on Mustang with UEFI where the built in DTB contains a
> >>> node of this type.
> >>>
> >>> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> >>> ---
> >>> xen/arch/arm/domain_build.c | 1 +
> >>> 1 file changed, 1 insertion(+)
> >>>
> >>> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> >>> index 1e545fe..8e87315 100644
> >>> --- a/xen/arch/arm/domain_build.c
> >>> +++ b/xen/arch/arm/domain_build.c
> >>> @@ -1105,6 +1105,7 @@ static int handle_node(struct domain *d, struct kernel_info *kinfo,
> >>> DT_MATCH_COMPATIBLE("multiboot,module"),
> >>> DT_MATCH_COMPATIBLE("arm,psci"),
> >>> DT_MATCH_COMPATIBLE("arm,psci-0.2"),
> >>> + DT_MATCH_COMPATIBLE("arm,armv8-pmuv3"),
> >>
> >> Will you are here, can you blacklist at list "arm,cortex-a15-pmu" and
> >> "arm,cortex-a7-pmu"?
> >>
> >> I suspect we would have the same problem with them.
> >
> > Suspect, or know?
>
> It's based on the documentation
> (Documentation/devicetree/bindings/arm/pmu.txt):
>
> "- interrupts : 1 combined interrupt or 1 per core. If the interrupt is
> a per-cpu
> interrupt (PPI) then 1 interrupt should be specified.
> "
Thanks, I'll include that reference.
Ian.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-06-05 11:39 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2015-06-04 16:49 [PATCH] xen: arm: Do not expose PMU to domain 0 Ian Campbell
2015-06-05 10:17 ` Julien Grall
2015-06-05 10:25 ` Ian Campbell
2015-06-05 11:20 ` Julien Grall
2015-06-05 11:39 ` Ian Campbell
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