From: "Siluvery, Arun" <arun.siluvery@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers
Date: Fri, 05 Jun 2015 12:24:58 +0100 [thread overview]
Message-ID: <5571870A.9060407@linux.intel.com> (raw)
In-Reply-To: <20150605105658.GK27056@nuc-i3427.alporthouse.com>
On 05/06/2015 11:56, Chris Wilson wrote:
> On Fri, Jun 05, 2015 at 11:34:01AM +0100, Arun Siluvery wrote:
>> Some of the WA are to be applied during context save but before restore and
>> some at the end of context save/restore but before executing the instructions
>> in the ring, WA batch buffers are created for this purpose and these WA cannot
>> be applied using normal means. Each context has two registers to load the
>> offsets of these batch buffers. If they are non-zero, HW understands that it
>> need to execute these batches.
>>
>> v1: In this version two separate ring_buffer objects were used to load WA
>> instructions for indirect and per context batch buffers and they were part
>> of every context.
>>
>> v2: Chris suggested to include additional page in context and use it to load
>> these WA instead of creating separate objects. This will simplify lot of things
>> as we need not explicity pin/unpin them. Thomas Daniel further pointed that GuC
>> is planning to use a similar setup to share data between GuC and driver and
>> WA batch buffers can probably share that page. However after discussions with
>> Dave who is implementing GuC changes, he suggested to use an independent page
>> for the reasons - GuC area might grow and these WA are initialized only once and
>> are not changed afterwards so we can share them share across all contexts.
>> This version uses this approach.
>> (Thanks to Chris, Dave and Thomas for their inputs)
>
> Having moved to a shared wa_ctx for all lrc, I think it makes sense to
> then do the allocation during ring_init itself, next to the scratch/hws
> status pages. The advantage is that we don't then need to add more
> special cases to the default ctx on RCS, and its permanence is far more
> prominent. It will also be more consistent with calling it ring->wa_ctx.
>
> Since you have it already plumbed into ring init/fini, why is it partly
> done during default ctx init? Maybe all that is required a little bit of
> code and changelog explanation.
> -Chris
>
ok, it is possible to do the allocation and setup in logical_ring_init()
itself. I wanted to group it with other wa which are setup in
init_context().
I will also change s/reg_state/cmd.
regards
Arun
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-06-05 11:25 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-05 10:34 [PATCH v3 0/6] Add Per-context WA using WA batch buffers Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 1/6] drm/i915/gen8: Add infrastructure to initialize " Arun Siluvery
2015-06-05 10:56 ` Chris Wilson
2015-06-05 11:24 ` Siluvery, Arun [this message]
2015-06-05 11:36 ` Chris Wilson
2015-06-05 11:56 ` Siluvery, Arun
2015-06-05 11:00 ` Chris Wilson
2015-06-15 15:22 ` Daniel Vetter
2015-06-15 15:23 ` Siluvery, Arun
2015-06-05 13:54 ` Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode Arun Siluvery
2015-06-05 13:55 ` Arun Siluvery
2015-06-09 15:27 ` Dave Gordon
2015-06-09 15:34 ` Siluvery, Arun
2015-06-05 10:34 ` [PATCH v3 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround Arun Siluvery
2015-06-05 13:56 ` Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround Arun Siluvery
2015-06-05 13:56 ` Arun Siluvery
2015-06-05 14:48 ` Ville Syrjälä
2015-06-12 11:51 ` Siluvery, Arun
2015-06-09 17:06 ` Dave Gordon
2015-06-05 10:34 ` [PATCH v3 5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround Arun Siluvery
2015-06-05 13:57 ` Arun Siluvery
2015-06-05 10:34 ` [PATCH v3 6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround Arun Siluvery
2015-06-05 13:57 ` Arun Siluvery
2015-06-09 18:43 ` Dave Gordon
2015-06-12 11:58 ` Siluvery, Arun
2015-06-12 17:03 ` Dave Gordon
2015-06-15 14:10 ` Siluvery, Arun
2015-06-15 17:29 ` Dave Gordon
2015-06-15 18:09 ` Siluvery, Arun
2015-06-15 15:27 ` Daniel Vetter
2015-06-06 8:20 ` shuang.he
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5571870A.9060407@linux.intel.com \
--to=arun.siluvery@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.