[PATCH 0/4] MIPS: BMIPS: dts: add NAND device nodes for bcm7xxx platforms

[PATCH 0/4] MIPS: BMIPS: dts: add NAND device nodes for bcm7xxx platforms

[Jaedon Shin]

Hi all,

This patch series contain changing device nodes of the bcm7xxx platforms.

Jaedon Shin (4):
  MIPS: BMIPS: bcm7346: add nodes for NAND
  MIPS: BMIPS: bcm7358: add nodes for NAND
  MIPS: BMIPS: bcm7360: add nodes for NAND
  MIPS: BMIPS: bcm7362: add nodes for NAND

 arch/mips/boot/dts/brcm/bcm7346.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7358.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7360.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7362.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 23 +++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97358svmb.dts  | 23 +++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97360svmb.dts  | 23 +++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97362svmb.dts  | 23 +++++++++++++++++++++++
 8 files changed, 180 insertions(+)

-- 
2.4.4

[PATCH 0/4] MIPS: BMIPS: dts: add NAND device nodes for bcm7xxx platforms

[Jaedon Shin]

Hi all,

This patch series contain changing device nodes of the bcm7xxx platforms.

Jaedon Shin (4):
  MIPS: BMIPS: bcm7346: add nodes for NAND
  MIPS: BMIPS: bcm7358: add nodes for NAND
  MIPS: BMIPS: bcm7360: add nodes for NAND
  MIPS: BMIPS: bcm7362: add nodes for NAND

 arch/mips/boot/dts/brcm/bcm7346.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7358.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7360.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm7362.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 23 +++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97358svmb.dts  | 23 +++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97360svmb.dts  | 23 +++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97362svmb.dts  | 23 +++++++++++++++++++++++
 8 files changed, 180 insertions(+)

-- 
2.4.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7346 platform.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
 arch/mips/boot/dts/brcm/bcm7346.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 1f30728a3177..5080df3fc594 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -220,5 +220,27 @@
 			interrupts = <76>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index 70f196d89d26..ee9a68f945fd 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -56,3 +56,26 @@
 &ohci3 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

[PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7346 platform.

Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/mips/boot/dts/brcm/bcm7346.dtsi      | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97346dbsmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 1f30728a3177..5080df3fc594 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -220,5 +220,27 @@
 			interrupts = <76>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index 70f196d89d26..ee9a68f945fd 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -56,3 +56,26 @@
 &ohci3 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 2/4] MIPS: BMIPS: bcm7358: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7358 platform.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
 arch/mips/boot/dts/brcm/bcm7358.dtsi     | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97358svmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 2c2aa9368f76..481d754d1b19 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -157,5 +157,27 @@
 			interrupts = <66>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index d18e6d947739..5f7b25410032 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -32,3 +32,26 @@
 &ohci0 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

[PATCH 2/4] MIPS: BMIPS: bcm7358: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7358 platform.

Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/mips/boot/dts/brcm/bcm7358.dtsi     | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97358svmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 2c2aa9368f76..481d754d1b19 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -157,5 +157,27 @@
 			interrupts = <66>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index d18e6d947739..5f7b25410032 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -32,3 +32,26 @@
 &ohci0 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 3/4] MIPS: BMIPS: bcm7360: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7360 platform.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
 arch/mips/boot/dts/brcm/bcm7360.dtsi     | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97360svmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index f23b0aed276f..cfa1830a411c 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -157,5 +157,27 @@
 			interrupts = <66>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 4fe515500102..e45f1d519667 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -32,3 +32,26 @@
 &ohci0 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

[PATCH 3/4] MIPS: BMIPS: bcm7360: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7360 platform.

Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/mips/boot/dts/brcm/bcm7360.dtsi     | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97360svmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index f23b0aed276f..cfa1830a411c 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -157,5 +157,27 @@
 			interrupts = <66>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 4fe515500102..e45f1d519667 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -32,3 +32,26 @@
 &ohci0 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 4/4] MIPS: BMIPS: bcm7362: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7362 platform.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
---
 arch/mips/boot/dts/brcm/bcm7362.dtsi     | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97362svmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index da99db665bbc..175998e388cf 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -163,5 +163,27 @@
 			interrupts = <66>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index b7b88e5dc9e7..4fe069c5392b 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -32,3 +32,26 @@
 &ohci0 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

[PATCH 4/4] MIPS: BMIPS: bcm7362: add nodes for NAND

[Jaedon Shin]

Add NAND device nodes to BMIPS based BCM7362 platform.

Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/mips/boot/dts/brcm/bcm7362.dtsi     | 22 ++++++++++++++++++++++
 arch/mips/boot/dts/brcm/bcm97362svmb.dts | 23 +++++++++++++++++++++++
 2 files changed, 45 insertions(+)

diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index da99db665bbc..175998e388cf 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -163,5 +163,27 @@
 			interrupts = <66>;
 			status = "disabled";
 		};
+
+		hif_intr2_intc: interrupt-controller@411000 {
+			compatible = "brcm,l2-intc";
+			reg = <0x411000 0x30>;
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			interrupt-parent = <&periph_intc>;
+			interrupts = <30>;
+			interrupt-names = "hif";
+		};
+
+		nand0: nand@412800 {
+			compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg-names = "nand";
+			reg = <0x412800 0x400>;
+			interrupt-parent = <&hif_intr2_intc>;
+			interrupt-names = "nand_ctlrdy";
+			interrupts = <24>;
+			status = "disabled";
+		};
 	};
 };
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index b7b88e5dc9e7..4fe069c5392b 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -32,3 +32,26 @@
 &ohci0 {
 	status = "okay";
 };
+
+&nand0 {
+	status = "okay";
+
+	nandcs@1 {
+		compatible = "brcm,nandcs";
+		reg = <1>;
+		nand-ecc-step-size = <512>;
+		nand-ecc-strength = <8>;
+		nand-on-flash-bbt;
+
+		#size-cells = <2>;
+		#address-cells = <2>;
+
+		flash1.rootfs0@0 {
+			reg = <0x0 0x0 0x0 0x80000000>;
+		};
+
+		flash1.rootfs1@80000000 {
+			reg = <0x0 0x80000000 0x0 0x80000000>;
+		};
+	};
+};
-- 
2.4.4

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli]

+Brian,

On 23/06/15 23:08, Jaedon Shin wrote:
> Add NAND device nodes to BMIPS based BCM7346 platform.
> 
> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
> ---

[snip]

> +
> +&nand0 {
> +	status = "okay";
> +
> +	nandcs@1 {
> +		compatible = "brcm,nandcs";
> +		reg = <1>;
> +		nand-ecc-step-size = <512>;
> +		nand-ecc-strength = <8>;
> +		nand-on-flash-bbt;
> +
> +		#size-cells = <2>;
> +		#address-cells = <2>;
> +
> +		flash1.rootfs0@0 {
> +			reg = <0x0 0x0 0x0 0x80000000>;
> +		};
> +
> +		flash1.rootfs1@80000000 {
> +			reg = <0x0 0x80000000 0x0 0x80000000>;
> +		};
> +	};
> +};

Should we create something like brcmnand-cs1-512-8 to reduce the amount
of duplication between DTS files?
-- 
Florian

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli]

+Brian,

On 23/06/15 23:08, Jaedon Shin wrote:
> Add NAND device nodes to BMIPS based BCM7346 platform.
> 
> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---

[snip]

> +
> +&nand0 {
> +	status = "okay";
> +
> +	nandcs@1 {
> +		compatible = "brcm,nandcs";
> +		reg = <1>;
> +		nand-ecc-step-size = <512>;
> +		nand-ecc-strength = <8>;
> +		nand-on-flash-bbt;
> +
> +		#size-cells = <2>;
> +		#address-cells = <2>;
> +
> +		flash1.rootfs0@0 {
> +			reg = <0x0 0x0 0x0 0x80000000>;
> +		};
> +
> +		flash1.rootfs1@80000000 {
> +			reg = <0x0 0x80000000 0x0 0x80000000>;
> +		};
> +	};
> +};

Should we create something like brcmnand-cs1-512-8 to reduce the amount
of duplication between DTS files?
-- 
Florian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> 
> +Brian,
> 
> On 23/06/15 23:08, Jaedon Shin wrote:
>> Add NAND device nodes to BMIPS based BCM7346 platform.
>> 
>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>> ---
> 
> [snip]
> 
>> +
>> +&nand0 {
>> +	status = "okay";
>> +
>> +	nandcs@1 {
>> +		compatible = "brcm,nandcs";
>> +		reg = <1>;
>> +		nand-ecc-step-size = <512>;
>> +		nand-ecc-strength = <8>;
>> +		nand-on-flash-bbt;
>> +
>> +		#size-cells = <2>;
>> +		#address-cells = <2>;
>> +
>> +		flash1.rootfs0@0 {
>> +			reg = <0x0 0x0 0x0 0x80000000>;
>> +		};
>> +
>> +		flash1.rootfs1@80000000 {
>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>> +		};
>> +	};
>> +};
> 
> Should we create something like brcmnand-cs1-512-8 to reduce the amount
> of duplication between DTS files?
> -- 
> Florian

I Think that is not duplication.

I have no reference boards, but this node is maybe explaining for hardware
description of the BCM97346DBSMB reference board. The nodes are changed by
EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
brcmnand-cs1-512-4 for others.

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> 
> +Brian,
> 
> On 23/06/15 23:08, Jaedon Shin wrote:
>> Add NAND device nodes to BMIPS based BCM7346 platform.
>> 
>> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
> 
> [snip]
> 
>> +
>> +&nand0 {
>> +	status = "okay";
>> +
>> +	nandcs@1 {
>> +		compatible = "brcm,nandcs";
>> +		reg = <1>;
>> +		nand-ecc-step-size = <512>;
>> +		nand-ecc-strength = <8>;
>> +		nand-on-flash-bbt;
>> +
>> +		#size-cells = <2>;
>> +		#address-cells = <2>;
>> +
>> +		flash1.rootfs0@0 {
>> +			reg = <0x0 0x0 0x0 0x80000000>;
>> +		};
>> +
>> +		flash1.rootfs1@80000000 {
>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>> +		};
>> +	};
>> +};
> 
> Should we create something like brcmnand-cs1-512-8 to reduce the amount
> of duplication between DTS files?
> -- 
> Florian

I Think that is not duplication.

I have no reference boards, but this node is maybe explaining for hardware
description of the BCM97346DBSMB reference board. The nodes are changed by
EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
brcmnand-cs1-512-4 for others.
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli]

Le 06/25/15 01:52, Jaedon Shin a écrit :
> 
>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>
>> +Brian,
>>
>> On 23/06/15 23:08, Jaedon Shin wrote:
>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>
>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>> ---
>>
>> [snip]
>>
>>> +
>>> +&nand0 {
>>> +	status = "okay";
>>> +
>>> +	nandcs@1 {
>>> +		compatible = "brcm,nandcs";
>>> +		reg = <1>;
>>> +		nand-ecc-step-size = <512>;
>>> +		nand-ecc-strength = <8>;
>>> +		nand-on-flash-bbt;
>>> +
>>> +		#size-cells = <2>;
>>> +		#address-cells = <2>;
>>> +
>>> +		flash1.rootfs0@0 {
>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>> +		};
>>> +
>>> +		flash1.rootfs1@80000000 {
>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>> +		};
>>> +	};
>>> +};
>>
>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>> of duplication between DTS files?
>> -- 
>> Florian
> 
> I Think that is not duplication.
> 
> I have no reference boards, but this node is maybe explaining for hardware
> description of the BCM97346DBSMB reference board. The nodes are changed by
> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
> brcmnand-cs1-512-4 for others.

Then I am confused, your 4 patches add identical NAND flash chip
properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
size and 8 bits of ECC strength, am I missing something?
-- 
Florian

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli]

Le 06/25/15 01:52, Jaedon Shin a écrit :
> 
>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>
>> +Brian,
>>
>> On 23/06/15 23:08, Jaedon Shin wrote:
>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>
>>> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>> ---
>>
>> [snip]
>>
>>> +
>>> +&nand0 {
>>> +	status = "okay";
>>> +
>>> +	nandcs@1 {
>>> +		compatible = "brcm,nandcs";
>>> +		reg = <1>;
>>> +		nand-ecc-step-size = <512>;
>>> +		nand-ecc-strength = <8>;
>>> +		nand-on-flash-bbt;
>>> +
>>> +		#size-cells = <2>;
>>> +		#address-cells = <2>;
>>> +
>>> +		flash1.rootfs0@0 {
>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>> +		};
>>> +
>>> +		flash1.rootfs1@80000000 {
>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>> +		};
>>> +	};
>>> +};
>>
>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>> of duplication between DTS files?
>> -- 
>> Florian
> 
> I Think that is not duplication.
> 
> I have no reference boards, but this node is maybe explaining for hardware
> description of the BCM97346DBSMB reference board. The nodes are changed by
> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
> brcmnand-cs1-512-4 for others.

Then I am confused, your 4 patches add identical NAND flash chip
properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
size and 8 bits of ECC strength, am I missing something?
-- 
Florian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

> On Jun 26, 2015, at 12:00 PM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> 
> Le 06/25/15 01:52, Jaedon Shin a écrit :
>> 
>>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>> 
>>> +Brian,
>>> 
>>> On 23/06/15 23:08, Jaedon Shin wrote:
>>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>> 
>>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>>> ---
>>> 
>>> [snip]
>>> 
>>>> +
>>>> +&nand0 {
>>>> +	status = "okay";
>>>> +
>>>> +	nandcs@1 {
>>>> +		compatible = "brcm,nandcs";
>>>> +		reg = <1>;
>>>> +		nand-ecc-step-size = <512>;
>>>> +		nand-ecc-strength = <8>;
>>>> +		nand-on-flash-bbt;
>>>> +
>>>> +		#size-cells = <2>;
>>>> +		#address-cells = <2>;
>>>> +
>>>> +		flash1.rootfs0@0 {
>>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>>> +		};
>>>> +
>>>> +		flash1.rootfs1@80000000 {
>>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>>> +		};
>>>> +	};
>>>> +};
>>> 
>>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>>> of duplication between DTS files?
>>> -- 
>>> Florian
>> 
>> I Think that is not duplication.
>> 
>> I have no reference boards, but this node is maybe explaining for hardware
>> description of the BCM97346DBSMB reference board. The nodes are changed by
>> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
>> brcmnand-cs1-512-4 for others.
> 

The *others* means BCM7346 based set-top box of manufacturer. they are not
bcm973XX{dbsmb,svmb} boards.

> Then I am confused, your 4 patches add identical NAND flash chip
> properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
> size and 8 bits of ECC strength, am I missing something?
> -- 
> Florian

The mips based reference boards have postfix of DBSMB, SVMB, SFF and others.
they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write
the DT of bcm97346sff.dts, therefore it has different fields.

Then I expected that mips 40nm based SVMB type reference boards have the same
properties. but, I don't have confidence. AISE I have no reference boards
unfortunately. if you can contact with people who have reference board, would
tell me information of #CS and NAND. 
From f.fainelli@gmail.com Fri Jun 26 18:34:16 2015
Received: with ECARTIS (v1.0.0; list linux-mips); Fri, 26 Jun 2015 18:34:18 +0200 (CEST)
Received: from mail-pd0-f172.google.com ([209.85.192.172]:34879 "EHLO
        mail-pd0-f172.google.com" rhost-flags-OK-OK-OK-OK)
        by eddie.linux-mips.org with ESMTP id S27009162AbbFZQeQgo530 (ORCPT
        <rfc822;linux-mips@linux-mips.org>); Fri, 26 Jun 2015 18:34:16 +0200
Received: by pdbci14 with SMTP id ci14so77885021pdb.2;
        Fri, 26 Jun 2015 09:34:10 -0700 (PDT)
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
        d=gmail.com; s=20120113;
        h=message-id:date:from:user-agent:mime-version:to:cc:subject
         :references:in-reply-to:content-type:content-transfer-encoding;
        bh=YN9mvI/QpL6W3C1xuQY2Ig8kyV5aEUWPGLiamGWKM1w=;
        b=i5ag9SEldSZafsw2/yeWye7GoLeSLotgrkSoyg+UPU+RkEW0/BJ8S21be1OT2WUto4
         0DdpuGS1+f+W7IizBq7mBg9Ksme6BT258Q6yTKGpU/eJP7BbE9Yy4S8VhSMBm8+2XIfG
         rSxp1JmEuPO1KmaDwNRyNeNV0UpC4rULY0DmsgdQ+1aARX3iLY5aXFaeLBvc3ZzqpLTG
         n4HBlw1mc1s3Hs3C//zX9yqKFQL7tjQ+697gPu4ISUU9f8/9dwjuciqZyAvkclRmo2YV
         mqDgpRq6uccv5pgU+AhQQBQf76+8RtHQk7Z1VXO1RouRlcoAfqrjcmLHk0br+6jmskRa
         N3Hw==
X-Received: by 10.67.30.136 with SMTP id ke8mr4958612pad.79.1435336450410;
        Fri, 26 Jun 2015 09:34:10 -0700 (PDT)
Received: from [10.12.156.244] (5520-maca-inet1-outside.broadcom.com. [216.31.211.11])
        by mx.google.com with ESMTPSA id fp3sm33900348pdb.52.2015.06.26.09.34.08
        (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);
        Fri, 26 Jun 2015 09:34:09 -0700 (PDT)
Message-ID: <558D7EA5.9030202@gmail.com>
Date:   Fri, 26 Jun 2015 09:32:37 -0700
From:   Florian Fainelli <f.fainelli@gmail.com>
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0
MIME-Version: 1.0
To:     Jaedon Shin <jaedon.shin@gmail.com>
CC:     Ralf Baechle <ralf@linux-mips.org>,
        Kevin Cernekee <cernekee@gmail.com>, linux-mips@linux-mips.org,
        devicetree@vger.kernel.org, computersforpeace@gmail.com
Subject: Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND
References: <cover.1435124524.git.jaedon.shin@gmail.com> <1544bf6110b43fbaa8dbb3b06a18e08ae87b386d.1435124524.git.jaedon.shin@gmail.com> <558B05B7.8010401@gmail.com> <EFAFA0BE-CC2F-4342-9C89-DED8EC6CF377@gmail.com> <558CC050.6040101@gmail.com> <D85A0C84-46BA-4F77-9A90-DE21EBED1887@gmail.com>
In-Reply-To: <D85A0C84-46BA-4F77-9A90-DE21EBED1887@gmail.com>
Content-Type: text/plain; charset=utf-8
Content-Transfer-Encoding: 8bit
Return-Path: <f.fainelli@gmail.com>
X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0)
X-Orcpt: rfc822;linux-mips@linux-mips.org
Original-Recipient: rfc822;linux-mips@linux-mips.org
X-archive-position: 48036
X-ecartis-version: Ecartis v1.0.0
Sender: linux-mips-bounce@linux-mips.org
Errors-to: linux-mips-bounce@linux-mips.org
X-original-sender: f.fainelli@gmail.com
Precedence: bulk
List-help: <mailto:ecartis@linux-mips.org?Subject=help>
List-unsubscribe: <mailto:ecartis@linux-mips.org?subject=unsubscribe%20linux-mips>
List-software: Ecartis version 1.0.0
List-Id: linux-mips <linux-mips.eddie.linux-mips.org>
X-List-ID: linux-mips <linux-mips.eddie.linux-mips.org>
List-subscribe: <mailto:ecartis@linux-mips.org?subject=subscribe%20linux-mips>
List-owner: <mailto:ralf@linux-mips.org>
List-post: <mailto:linux-mips@linux-mips.org>
List-archive: <http://www.linux-mips.org/archives/linux-mips/>
X-list: linux-mips
Content-Length: 2788
Lines: 87

On 26/06/15 06:54, Jaedon Shin wrote:
> 
>> On Jun 26, 2015, at 12:00 PM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>
>> Le 06/25/15 01:52, Jaedon Shin a écrit :
>>>
>>>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>>>
>>>> +Brian,
>>>>
>>>> On 23/06/15 23:08, Jaedon Shin wrote:
>>>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>>>
>>>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>>>> ---
>>>>
>>>> [snip]
>>>>
>>>>> +
>>>>> +&nand0 {
>>>>> +	status = "okay";
>>>>> +
>>>>> +	nandcs@1 {
>>>>> +		compatible = "brcm,nandcs";
>>>>> +		reg = <1>;
>>>>> +		nand-ecc-step-size = <512>;
>>>>> +		nand-ecc-strength = <8>;
>>>>> +		nand-on-flash-bbt;
>>>>> +
>>>>> +		#size-cells = <2>;
>>>>> +		#address-cells = <2>;
>>>>> +
>>>>> +		flash1.rootfs0@0 {
>>>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>>>> +		};
>>>>> +
>>>>> +		flash1.rootfs1@80000000 {
>>>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>>>> +		};
>>>>> +	};
>>>>> +};
>>>>
>>>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>>>> of duplication between DTS files?
>>>> -- 
>>>> Florian
>>>
>>> I Think that is not duplication.
>>>
>>> I have no reference boards, but this node is maybe explaining for hardware
>>> description of the BCM97346DBSMB reference board. The nodes are changed by
>>> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
>>> brcmnand-cs1-512-4 for others.
>>
> 
> The *others* means BCM7346 based set-top box of manufacturer. they are not
> bcm973XX{dbsmb,svmb} boards.

Understood.

> 
>> Then I am confused, your 4 patches add identical NAND flash chip
>> properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
>> size and 8 bits of ECC strength, am I missing something?
>> -- 
>> Florian
> 
> The mips based reference boards have postfix of DBSMB, SVMB, SFF and others.
> they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write
> the DT of bcm97346sff.dts, therefore it has different fields.
> 
> Then I expected that mips 40nm based SVMB type reference boards have the same
> properties. but, I don't have confidence. AISE I have no reference boards
> unfortunately. if you can contact with people who have reference board, would
> tell me information of #CS and NAND.

I agree with you that outside of reference boards, these flash settings
will vary, however, Broadcom reference boards tend to follow the same
design from one chip/board to another, so instead of replicating 4 times
the same DT snippet in Device Tree, we could come up with differerent
sets of include files which abstract commonly found NAND flash types and
properties. Code might talk better, so I will try to submit something
that illustrates what I have in mind.

Thanks!
-- 
Florian

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

> On Jun 26, 2015, at 12:00 PM, Florian Fainelli <f.fainelli@gmail.com> wrote:
> 
> Le 06/25/15 01:52, Jaedon Shin a écrit :
>> 
>>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>> 
>>> +Brian,
>>> 
>>> On 23/06/15 23:08, Jaedon Shin wrote:
>>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>> 
>>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>>> ---
>>> 
>>> [snip]
>>> 
>>>> +
>>>> +&nand0 {
>>>> +	status = "okay";
>>>> +
>>>> +	nandcs@1 {
>>>> +		compatible = "brcm,nandcs";
>>>> +		reg = <1>;
>>>> +		nand-ecc-step-size = <512>;
>>>> +		nand-ecc-strength = <8>;
>>>> +		nand-on-flash-bbt;
>>>> +
>>>> +		#size-cells = <2>;
>>>> +		#address-cells = <2>;
>>>> +
>>>> +		flash1.rootfs0@0 {
>>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>>> +		};
>>>> +
>>>> +		flash1.rootfs1@80000000 {
>>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>>> +		};
>>>> +	};
>>>> +};
>>> 
>>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>>> of duplication between DTS files?
>>> -- 
>>> Florian
>> 
>> I Think that is not duplication.
>> 
>> I have no reference boards, but this node is maybe explaining for hardware
>> description of the BCM97346DBSMB reference board. The nodes are changed by
>> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
>> brcmnand-cs1-512-4 for others.
> 

The *others* means BCM7346 based set-top box of manufacturer. they are not
bcm973XX{dbsmb,svmb} boards.

> Then I am confused, your 4 patches add identical NAND flash chip
> properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
> size and 8 bits of ECC strength, am I missing something?
> -- 
> Florian

The mips based reference boards have postfix of DBSMB, SVMB, SFF and others.
they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write
the DT of bcm97346sff.dts, therefore it has different fields.

Then I expected that mips 40nm based SVMB type reference boards have the same
properties. but, I don't have confidence. AISE I have no reference boards
unfortunately. if you can contact with people who have reference board, would
tell me information of #CS and NAND. 

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Jaedon Shin]

> On Jun 26, 2015, at 12:00 PM, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> 
> Le 06/25/15 01:52, Jaedon Shin a écrit :
>> 
>>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>> 
>>> +Brian,
>>> 
>>> On 23/06/15 23:08, Jaedon Shin wrote:
>>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>> 
>>>> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>>> ---
>>> 
>>> [snip]
>>> 
>>>> +
>>>> +&nand0 {
>>>> +	status = "okay";
>>>> +
>>>> +	nandcs@1 {
>>>> +		compatible = "brcm,nandcs";
>>>> +		reg = <1>;
>>>> +		nand-ecc-step-size = <512>;
>>>> +		nand-ecc-strength = <8>;
>>>> +		nand-on-flash-bbt;
>>>> +
>>>> +		#size-cells = <2>;
>>>> +		#address-cells = <2>;
>>>> +
>>>> +		flash1.rootfs0@0 {
>>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>>> +		};
>>>> +
>>>> +		flash1.rootfs1@80000000 {
>>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>>> +		};
>>>> +	};
>>>> +};
>>> 
>>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>>> of duplication between DTS files?
>>> -- 
>>> Florian
>> 
>> I Think that is not duplication.
>> 
>> I have no reference boards, but this node is maybe explaining for hardware
>> description of the BCM97346DBSMB reference board. The nodes are changed by
>> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
>> brcmnand-cs1-512-4 for others.
> 

The *others* means BCM7346 based set-top box of manufacturer. they are not
bcm973XX{dbsmb,svmb} boards.

> Then I am confused, your 4 patches add identical NAND flash chip
> properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
> size and 8 bits of ECC strength, am I missing something?
> -- 
> Florian

The mips based reference boards have postfix of DBSMB, SVMB, SFF and others.
they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write
the DT of bcm97346sff.dts, therefore it has different fields.

Then I expected that mips 40nm based SVMB type reference boards have the same
properties. but, I don't have confidence. AISE I have no reference boards
unfortunately. if you can contact with people who have reference board, would
tell me information of #CS and NAND. --
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli]

On 26/06/15 06:54, Jaedon Shin wrote:
> 
>> On Jun 26, 2015, at 12:00 PM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>
>> Le 06/25/15 01:52, Jaedon Shin a écrit :
>>>
>>>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli@gmail.com> wrote:
>>>>
>>>> +Brian,
>>>>
>>>> On 23/06/15 23:08, Jaedon Shin wrote:
>>>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>>>
>>>>> Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
>>>>> ---
>>>>
>>>> [snip]
>>>>
>>>>> +
>>>>> +&nand0 {
>>>>> +	status = "okay";
>>>>> +
>>>>> +	nandcs@1 {
>>>>> +		compatible = "brcm,nandcs";
>>>>> +		reg = <1>;
>>>>> +		nand-ecc-step-size = <512>;
>>>>> +		nand-ecc-strength = <8>;
>>>>> +		nand-on-flash-bbt;
>>>>> +
>>>>> +		#size-cells = <2>;
>>>>> +		#address-cells = <2>;
>>>>> +
>>>>> +		flash1.rootfs0@0 {
>>>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>>>> +		};
>>>>> +
>>>>> +		flash1.rootfs1@80000000 {
>>>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>>>> +		};
>>>>> +	};
>>>>> +};
>>>>
>>>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>>>> of duplication between DTS files?
>>>> -- 
>>>> Florian
>>>
>>> I Think that is not duplication.
>>>
>>> I have no reference boards, but this node is maybe explaining for hardware
>>> description of the BCM97346DBSMB reference board. The nodes are changed by
>>> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
>>> brcmnand-cs1-512-4 for others.
>>
> 
> The *others* means BCM7346 based set-top box of manufacturer. they are not
> bcm973XX{dbsmb,svmb} boards.

Understood.

> 
>> Then I am confused, your 4 patches add identical NAND flash chip
>> properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
>> size and 8 bits of ECC strength, am I missing something?
>> -- 
>> Florian
> 
> The mips based reference boards have postfix of DBSMB, SVMB, SFF and others.
> they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write
> the DT of bcm97346sff.dts, therefore it has different fields.
> 
> Then I expected that mips 40nm based SVMB type reference boards have the same
> properties. but, I don't have confidence. AISE I have no reference boards
> unfortunately. if you can contact with people who have reference board, would
> tell me information of #CS and NAND.

I agree with you that outside of reference boards, these flash settings
will vary, however, Broadcom reference boards tend to follow the same
design from one chip/board to another, so instead of replicating 4 times
the same DT snippet in Device Tree, we could come up with differerent
sets of include files which abstract commonly found NAND flash types and
properties. Code might talk better, so I will try to submit something
that illustrates what I have in mind.

Thanks!
-- 
Florian

Re: [PATCH 1/4] MIPS: BMIPS: bcm7346: add nodes for NAND

[Florian Fainelli]

On 26/06/15 06:54, Jaedon Shin wrote:
> 
>> On Jun 26, 2015, at 12:00 PM, Florian Fainelli <f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>
>> Le 06/25/15 01:52, Jaedon Shin a écrit :
>>>
>>>> On Jun 25, 2015, at 4:32 AM, Florian Fainelli <f.fainelli-Re5JQEeQqe8@public.gmane.orgm> wrote:
>>>>
>>>> +Brian,
>>>>
>>>> On 23/06/15 23:08, Jaedon Shin wrote:
>>>>> Add NAND device nodes to BMIPS based BCM7346 platform.
>>>>>
>>>>> Signed-off-by: Jaedon Shin <jaedon.shin-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>>>>> ---
>>>>
>>>> [snip]
>>>>
>>>>> +
>>>>> +&nand0 {
>>>>> +	status = "okay";
>>>>> +
>>>>> +	nandcs@1 {
>>>>> +		compatible = "brcm,nandcs";
>>>>> +		reg = <1>;
>>>>> +		nand-ecc-step-size = <512>;
>>>>> +		nand-ecc-strength = <8>;
>>>>> +		nand-on-flash-bbt;
>>>>> +
>>>>> +		#size-cells = <2>;
>>>>> +		#address-cells = <2>;
>>>>> +
>>>>> +		flash1.rootfs0@0 {
>>>>> +			reg = <0x0 0x0 0x0 0x80000000>;
>>>>> +		};
>>>>> +
>>>>> +		flash1.rootfs1@80000000 {
>>>>> +			reg = <0x0 0x80000000 0x0 0x80000000>;
>>>>> +		};
>>>>> +	};
>>>>> +};
>>>>
>>>> Should we create something like brcmnand-cs1-512-8 to reduce the amount
>>>> of duplication between DTS files?
>>>> -- 
>>>> Florian
>>>
>>> I Think that is not duplication.
>>>
>>> I have no reference boards, but this node is maybe explaining for hardware
>>> description of the BCM97346DBSMB reference board. The nodes are changed by
>>> EBI CS and ECC capabilities of NAND flash. I used brcmnand-cs2-512-4 and
>>> brcmnand-cs1-512-4 for others.
>>
> 
> The *others* means BCM7346 based set-top box of manufacturer. they are not
> bcm973XX{dbsmb,svmb} boards.

Understood.

> 
>> Then I am confused, your 4 patches add identical NAND flash chip
>> properties for 7346, 7358, 7360 and 7362: CS#1, 512 bytes of ECC step
>> size and 8 bits of ECC strength, am I missing something?
>> -- 
>> Florian
> 
> The mips based reference boards have postfix of DBSMB, SVMB, SFF and others.
> they have different properties of DDR, #CS, SPI-NOR, NOR, NAND. if we write
> the DT of bcm97346sff.dts, therefore it has different fields.
> 
> Then I expected that mips 40nm based SVMB type reference boards have the same
> properties. but, I don't have confidence. AISE I have no reference boards
> unfortunately. if you can contact with people who have reference board, would
> tell me information of #CS and NAND.

I agree with you that outside of reference boards, these flash settings
will vary, however, Broadcom reference boards tend to follow the same
design from one chip/board to another, so instead of replicating 4 times
the same DT snippet in Device Tree, we could come up with differerent
sets of include files which abstract commonly found NAND flash types and
properties. Code might talk better, so I will try to submit something
that illustrates what I have in mind.

Thanks!
-- 
Florian
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html