From: James Morse <james.morse@arm.com>
To: Gabriele Paoloni <gabriele.paoloni@huawei.com>,
"Wangzhou (B)" <wangzhou1@hisilicon.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Jingoo Han <jg1.han@samsung.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Arnd Bergmann <arnd@arndb.de>, Liviu Dudau <Liviu.Dudau@arm.com>,
"kishon@ti.com" <kishon@ti.com>,
"xobs@kosagi.com" <xobs@kosagi.com>,
"m-karicheri2@ti.com" <m-karicheri2@ti.com>,
"Minghuan.Lian@freescale.com" <Minghuan.Lian@freescale.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Yuanzhichang <yuanzhichang@hisilicon.com>,
Zhudacai <zhudacai@hisilicon.com>,
zhangjukuo <zhangjukuo@huawei.com>,
qiuzhenfa <qiuzhenfa@hisilicon.com>,
"liguozhu@hisilicon.com" <liguozhu@hisilicon.com>
Subject: Re: [PATCH v3 2/5] PCI: designware: Add ARM64 support
Date: Wed, 01 Jul 2015 18:32:49 +0100 [thread overview]
Message-ID: <55942441.3050705@arm.com> (raw)
In-Reply-To: <EE11001F9E5DDD47B7634E2F8A612F2E01D4E6A2@lhreml503-mbs>
Gabriele Paoloni wrote:
>> Both series are applied to v4.1, use the same .config file, and the
>> same dtb.
>> I will investigate further.
>>
>> (Re-testing v2 works, so this isn't an interim hardware failure)
>
> This is a bit weird....
>
> Patch 2/5 is the only one that affect platforms different from Hisilicon
>
> The only difference between V3 patch[2/5] and v2 patch[2/4] is
Between v3:2/5 and your replacement for v2:2/4, which arrived after I had
tested the v2 series. As the patch has been replaced with a different one -
neither 'tested-by' is true any more.
It looks like the BAR containing the bridge window is not being assigned,
so no devices on bus 1 are discovered.
I will send the full v2 and v3 dmesg output separately.
Thanks,
James
WARNING: multiple messages have this Message-ID (diff)
From: james.morse@arm.com (James Morse)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 2/5] PCI: designware: Add ARM64 support
Date: Wed, 01 Jul 2015 18:32:49 +0100 [thread overview]
Message-ID: <55942441.3050705@arm.com> (raw)
In-Reply-To: <EE11001F9E5DDD47B7634E2F8A612F2E01D4E6A2@lhreml503-mbs>
Gabriele Paoloni wrote:
>> Both series are applied to v4.1, use the same .config file, and the
>> same dtb.
>> I will investigate further.
>>
>> (Re-testing v2 works, so this isn't an interim hardware failure)
>
> This is a bit weird....
>
> Patch 2/5 is the only one that affect platforms different from Hisilicon
>
> The only difference between V3 patch[2/5] and v2 patch[2/4] is
Between v3:2/5 and your replacement for v2:2/4, which arrived after I had
tested the v2 series. As the patch has been replaced with a different one -
neither 'tested-by' is true any more.
It looks like the BAR containing the bridge window is not being assigned,
so no devices on bus 1 are discovered.
I will send the full v2 and v3 dmesg output separately.
Thanks,
James
WARNING: multiple messages have this Message-ID (diff)
From: James Morse <james.morse-5wv7dgnIgG8@public.gmane.org>
To: Gabriele Paoloni
<gabriele.paoloni-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
"Wangzhou (B)"
<wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
Jingoo Han <jg1.han-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
Pratyush Anand
<pratyush.anand-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Liviu Dudau <Liviu.Dudau-5wv7dgnIgG8@public.gmane.org>,
"kishon-l0cyMroinI0@public.gmane.org"
<kishon-l0cyMroinI0@public.gmane.org>,
"xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org"
<xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org>,
"m-karicheri2-l0cyMroinI0@public.gmane.org"
<m-karicheri2-l0cyMroinI0@public.gmane.org>,
"Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org"
<Minghuan.Lian-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: "linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Yuanzhichang
<yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
Zhudacai <zhudacai-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
zhangjukuo <zhangjukuo-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>,
qiuzhenfa <qiuzhenfa-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
"liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org"
<liguozhu-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
Subject: Re: [PATCH v3 2/5] PCI: designware: Add ARM64 support
Date: Wed, 01 Jul 2015 18:32:49 +0100 [thread overview]
Message-ID: <55942441.3050705@arm.com> (raw)
In-Reply-To: <EE11001F9E5DDD47B7634E2F8A612F2E01D4E6A2@lhreml503-mbs>
Gabriele Paoloni wrote:
>> Both series are applied to v4.1, use the same .config file, and the
>> same dtb.
>> I will investigate further.
>>
>> (Re-testing v2 works, so this isn't an interim hardware failure)
>
> This is a bit weird....
>
> Patch 2/5 is the only one that affect platforms different from Hisilicon
>
> The only difference between V3 patch[2/5] and v2 patch[2/4] is
Between v3:2/5 and your replacement for v2:2/4, which arrived after I had
tested the v2 series. As the patch has been replaced with a different one -
neither 'tested-by' is true any more.
It looks like the BAR containing the bridge window is not being assigned,
so no devices on bus 1 are discovered.
I will send the full v2 and v3 dmesg output separately.
Thanks,
James
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next prev parent reply other threads:[~2015-07-01 17:32 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-01 9:43 [PATCH v3 0/5] PCI: hisi: Add PCIe host support for Hisilicon Soc Hip05 Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` [PATCH v3 1/5] ARM/PCI: remove align_resource callback in pcibios_align_resource Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-02 17:50 ` Liviu Dudau
2015-07-02 17:50 ` Liviu Dudau
2015-07-07 5:44 ` Zhou Wang
2015-07-07 5:44 ` Zhou Wang
2015-07-07 9:22 ` Liviu Dudau
2015-07-07 9:22 ` Liviu Dudau
2015-07-07 9:22 ` Liviu Dudau
2015-07-17 10:02 ` Gabriele Paoloni
2015-07-17 10:02 ` Gabriele Paoloni
2015-07-17 10:02 ` Gabriele Paoloni
2015-07-21 3:26 ` Zhou Wang
2015-07-21 3:26 ` Zhou Wang
2015-07-01 9:43 ` [PATCH v3 2/5] PCI: designware: Add ARM64 support Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 13:29 ` Gabriele Paoloni
2015-07-01 13:29 ` Gabriele Paoloni
2015-07-01 13:29 ` Gabriele Paoloni
2015-07-01 14:26 ` James Morse
2015-07-01 14:26 ` James Morse
2015-07-01 14:26 ` James Morse
2015-07-01 16:47 ` Gabriele Paoloni
2015-07-01 16:47 ` Gabriele Paoloni
2015-07-01 16:47 ` Gabriele Paoloni
2015-07-01 17:32 ` James Morse [this message]
2015-07-01 17:32 ` James Morse
2015-07-01 17:32 ` James Morse
2015-07-02 1:38 ` Zhou Wang
2015-07-02 1:38 ` Zhou Wang
2015-07-02 7:24 ` Gabriele Paoloni
2015-07-02 7:24 ` Gabriele Paoloni
2015-07-02 7:24 ` Gabriele Paoloni
2015-07-02 17:40 ` James Morse
2015-07-02 17:40 ` James Morse
2015-07-07 3:44 ` Zhou Wang
2015-07-07 3:44 ` Zhou Wang
2015-07-07 3:44 ` Zhou Wang
2015-07-10 8:53 ` Gabriele Paoloni
2015-07-10 8:53 ` Gabriele Paoloni
2015-07-10 8:53 ` Gabriele Paoloni
2015-07-10 9:36 ` Zhou Wang
2015-07-10 9:36 ` Zhou Wang
2015-07-02 1:16 ` Zhou Wang
2015-07-02 1:16 ` Zhou Wang
2015-07-01 9:43 ` [PATCH v3 3/5] PCI: hisi: Add PCIe host support for Hisilicon Soc Hip05 Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` [PATCH v3 4/5] Documentation: DT: Add Hisilicon PCIe host binding Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` [PATCH v3 5/5] MAINTAINERS: Add pcie-hisi maintainer Zhou Wang
2015-07-01 9:43 ` Zhou Wang
2015-07-01 9:43 ` Zhou Wang
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