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From: Leon Alrae <leon.alrae@imgtec.com>
To: Andrew Bennett <Andrew.Bennett@imgtec.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: Riku Voipio <riku.voipio@iki.fi>
Subject: Re: [Qemu-devel] [PATCH] linux-user: Fix MIPS N64 trap and break instruction bug
Date: Wed, 15 Jul 2015 16:54:06 +0100	[thread overview]
Message-ID: <55A6821E.8080306@imgtec.com> (raw)
In-Reply-To: <55929712.4090509@imgtec.com>

On 30/06/2015 14:18, Leon Alrae wrote:
> On 29/06/2015 11:20, Andrew Bennett wrote:
>> From: Andrew Bennett <andrew.bennett@imgtec.com>
>>
>> For the MIPS N64 ABI when QEMU reads the break/trap instruction so that
>> it can inspect the break/trap code it reads 8 rather than 4 bytes
>> which means it finds the code field from the instruction after the 
>> break/trap instruction.  This then causes the break/trap handling
>> code to fail because it does not understand the code number.
>>
>> The fix forces QEMU to always read 4 bytes of instruction data rather
>> than deciding how much to read based on the ABI.
>>
>> Signed-off-by: Andrew Bennett <andrew.bennett@imgtec.com>
>> ---
>>  linux-user/main.c |    4 ++--
>>  1 files changed, 2 insertions(+), 2 deletions(-)
> 
> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>

Riku, I'm including this patch in target-mips queue which I'm going to send
out soon for rc1. If you have any objections please let me know.

Thanks,
Leon

      reply	other threads:[~2015-07-15 15:54 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-29 10:20 [Qemu-devel] [PATCH] linux-user: Fix MIPS N64 trap and break instruction bug Andrew Bennett
2015-06-30 13:18 ` Leon Alrae
2015-07-15 15:54   ` Leon Alrae [this message]

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