From: Sudeep Holla <sudeep.holla@arm.com>
To: Grygorii Strashko <grygorii.strashko@ti.com>,
Marc Zyngier <Marc.Zyngier@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"tony@atomide.com" <tony@atomide.com>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"jason@lakedaemon.net" <jason@lakedaemon.net>,
"nsekhar@ti.com" <nsekhar@ti.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"balbi@ti.com" <balbi@ti.com>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v2 6/6] irqchip: crossbar: fix irq masking at suspend
Date: Thu, 13 Aug 2015 12:04:29 +0100 [thread overview]
Message-ID: <55CC79BD.4030001@arm.com> (raw)
In-Reply-To: <55CC6EB8.3050906@ti.com>
On 13/08/15 11:17, Grygorii Strashko wrote:
> On 08/13/2015 12:30 PM, Sudeep Holla wrote:
>>
>>
>> On 12/08/15 18:46, Grygorii Strashko wrote:
>>> All ARM GIC IRQs have to masked during suspend if they are not
>>> wakeup source. Now this is not happen, since switching to
>>> use IRQ domain hierarchy, because suspend_device_irq() only checks flags
>>> in the last IRQ chip in hierarchy for IRQCHIP_MASK_ON_SUSPEND
>>> bit set. And in the case of TI OMAP DRA7 the last IRQ chip is TI Crossbar
>>> which do not have this flag set.
>>>
>>> In case of TI OMAP DRA7 the following IRQ hierarchy is defined:
>>> ARM GIC <- OMAP wakeupgen <- TI CBAR
>>> ARM GIC - IRQCHIP_MASK_ON_SUSPEND=n
>>
>> May be this won't affect your platform or this patch but even GIC marks
>> IRQCHIP_MASK_ON_SUSPEND=y now since GIC doesn't provide any facility to
>> configure the wakeup source and keeps all the interrupt source enabled.
>
> That's true for next, bur not true for 4.2-rc6 or 4.1 :(
>
True, I just wanted to ensure there is no assumption.
[...]
>>
>> Also the beginning of the commit message contradicts when you also say
>> in the following statement IRQCHIP_MASK_ON_SUSPEND=n. So you may need to
>> update the log.
>
> I'll try to reword. What I've tried to mention that IRQs masking on
> suspend is default expected behavior and that how it was before
> switching to IRQ domain hierarchy.
>
> "All ARM GIC IRQs have to masked during suspend if they are not
> wakeup source - this is expected behavior and that's how it was before
> switching to IRQ domain hierarchy. ..."
> ok?
>
My mistake I referred the code after it was converted to use stack
domains. So I missed to understand that you were using gic_arch_extn
flags before to override GIC flags as gic_set_irqchip_flags was not
used when I removed it. Sorry for the noise, you can retain the commit
log as is.
Regards,
Sudeep
WARNING: multiple messages have this Message-ID (diff)
From: sudeep.holla@arm.com (Sudeep Holla)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 6/6] irqchip: crossbar: fix irq masking at suspend
Date: Thu, 13 Aug 2015 12:04:29 +0100 [thread overview]
Message-ID: <55CC79BD.4030001@arm.com> (raw)
In-Reply-To: <55CC6EB8.3050906@ti.com>
On 13/08/15 11:17, Grygorii Strashko wrote:
> On 08/13/2015 12:30 PM, Sudeep Holla wrote:
>>
>>
>> On 12/08/15 18:46, Grygorii Strashko wrote:
>>> All ARM GIC IRQs have to masked during suspend if they are not
>>> wakeup source. Now this is not happen, since switching to
>>> use IRQ domain hierarchy, because suspend_device_irq() only checks flags
>>> in the last IRQ chip in hierarchy for IRQCHIP_MASK_ON_SUSPEND
>>> bit set. And in the case of TI OMAP DRA7 the last IRQ chip is TI Crossbar
>>> which do not have this flag set.
>>>
>>> In case of TI OMAP DRA7 the following IRQ hierarchy is defined:
>>> ARM GIC <- OMAP wakeupgen <- TI CBAR
>>> ARM GIC - IRQCHIP_MASK_ON_SUSPEND=n
>>
>> May be this won't affect your platform or this patch but even GIC marks
>> IRQCHIP_MASK_ON_SUSPEND=y now since GIC doesn't provide any facility to
>> configure the wakeup source and keeps all the interrupt source enabled.
>
> That's true for next, bur not true for 4.2-rc6 or 4.1 :(
>
True, I just wanted to ensure there is no assumption.
[...]
>>
>> Also the beginning of the commit message contradicts when you also say
>> in the following statement IRQCHIP_MASK_ON_SUSPEND=n. So you may need to
>> update the log.
>
> I'll try to reword. What I've tried to mention that IRQs masking on
> suspend is default expected behavior and that how it was before
> switching to IRQ domain hierarchy.
>
> "All ARM GIC IRQs have to masked during suspend if they are not
> wakeup source - this is expected behavior and that's how it was before
> switching to IRQ domain hierarchy. ..."
> ok?
>
My mistake I referred the code after it was converted to use stack
domains. So I missed to understand that you were using gic_arch_extn
flags before to override GIC flags as gic_set_irqchip_flags was not
used when I removed it. Sorry for the noise, you can retain the commit
log as is.
Regards,
Sudeep
next prev parent reply other threads:[~2015-08-13 11:04 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-12 17:45 [PATCH v2 0/6] genirq: irqdomain_hierarchy: fixes Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-12 17:45 ` [PATCH v2 1/6] genirq: fix irq_chip_retrigger_hierarchy Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-13 9:26 ` Marc Zyngier
2015-08-13 9:26 ` Marc Zyngier
2015-08-12 17:45 ` [PATCH v2 2/6] genirq: fix irqchip_set_wake_parent if IRQCHIP_SKIP_SET_WAKE Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-13 8:54 ` Sudeep Holla
2015-08-13 8:54 ` Sudeep Holla
2015-08-13 9:51 ` Grygorii Strashko
2015-08-13 9:51 ` Grygorii Strashko
2015-08-13 10:33 ` Sudeep Holla
2015-08-13 10:33 ` Sudeep Holla
2015-08-13 10:01 ` Marc Zyngier
2015-08-13 10:01 ` Marc Zyngier
2015-08-13 10:31 ` Grygorii Strashko
2015-08-13 10:31 ` Grygorii Strashko
2015-08-13 12:58 ` Grygorii Strashko
2015-08-13 12:58 ` Grygorii Strashko
2015-08-14 10:18 ` Grygorii Strashko
2015-08-14 10:18 ` Grygorii Strashko
2015-08-14 10:18 ` Grygorii Strashko
2015-08-14 10:39 ` Marc Zyngier
2015-08-14 10:39 ` Marc Zyngier
2015-08-12 17:45 ` [PATCH v2 3/6] genirq: introduce irq_chip_set_type_parent() helper Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-12 17:45 ` Grygorii Strashko
2015-08-13 8:58 ` Sudeep Holla
2015-08-13 8:58 ` Sudeep Holla
2015-08-13 9:54 ` Grygorii Strashko
2015-08-13 9:54 ` Grygorii Strashko
2015-08-12 17:46 ` [PATCH v2 4/6] irqchip: crossbar: fix arm gic irq type configuration Grygorii Strashko
2015-08-12 17:46 ` Grygorii Strashko
2015-08-12 17:46 ` Grygorii Strashko
2015-08-12 17:46 ` [PATCH v2 5/6] ARM: OMAP: wakeupgen: " Grygorii Strashko
2015-08-12 17:46 ` Grygorii Strashko
2015-08-12 17:46 ` Grygorii Strashko
2015-08-13 9:50 ` Tony Lindgren
2015-08-13 9:50 ` Tony Lindgren
2015-08-12 17:46 ` [PATCH v2 6/6] irqchip: crossbar: fix irq masking at suspend Grygorii Strashko
2015-08-12 17:46 ` Grygorii Strashko
2015-08-12 17:46 ` Grygorii Strashko
2015-08-13 9:30 ` Sudeep Holla
2015-08-13 9:30 ` Sudeep Holla
2015-08-13 10:17 ` Grygorii Strashko
2015-08-13 10:17 ` Grygorii Strashko
2015-08-13 11:04 ` Sudeep Holla [this message]
2015-08-13 11:04 ` Sudeep Holla
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