All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jonathan Cameron <jic23@kernel.org>
To: Martin Kepplinger <martink@posteo.de>,
	knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net,
	mfuzzey@parkeon.com, roberta.dobrescu@gmail.com,
	robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
	ijc+devicetree@hellion.org.uk, galak@codeaurora.org
Cc: devicetree@vger.kernel.org, linux-iio@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	christoph.muellner@theobroma-systems.com,
	Martin Kepplinger <martin.kepplinger@theobroma-systems.com>
Subject: Re: [PATCH 3/6] iio: mma8452: add freefall / motion interrupt source
Date: Sat, 5 Sep 2015 17:58:58 +0100	[thread overview]
Message-ID: <55EB1F52.8000307@kernel.org> (raw)
In-Reply-To: <1441107913-4112-4-git-send-email-martink@posteo.de>

On 01/09/15 12:45, Martin Kepplinger wrote:
> This adds the freefall / motion interrupt source definitions to the driver.
> It is used in this series' next patch, for chips that don't support the
> transient interrupt source.
> 
> Signed-off-by: Martin Kepplinger <martin.kepplinger@theobroma-systems.com>
> Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Looks fine to me.  Will let sit for Peter and others to take a look if they like.

Jonathan
> ---
>  drivers/iio/accel/mma8452.c | 44 ++++++++++++++++++++++++++++++++++++--------
>  1 file changed, 36 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> index 7b2ab17..6b1a862 100644
> --- a/drivers/iio/accel/mma8452.c
> +++ b/drivers/iio/accel/mma8452.c
> @@ -42,6 +42,16 @@
>  #define  MMA8452_DATA_CFG_HPF_MASK		BIT(4)
>  #define MMA8452_HP_FILTER_CUTOFF		0x0f
>  #define  MMA8452_HP_FILTER_CUTOFF_SEL_MASK	GENMASK(1, 0)
> +#define MMA8452_FF_MT_CFG			0x15
> +#define  MMA8452_FF_MT_CFG_OAE			BIT(6)
> +#define  MMA8452_FF_MT_CFG_ELE			BIT(7)
> +#define MMA8452_FF_MT_SRC			0x16
> +#define  MMA8452_FF_MT_SRC_XHE			BIT(1)
> +#define  MMA8452_FF_MT_SRC_YHE			BIT(3)
> +#define  MMA8452_FF_MT_SRC_ZHE			BIT(5)
> +#define MMA8452_FF_MT_THS			0x17
> +#define  MMA8452_FF_MT_THS_MASK			0x7f
> +#define MMA8452_FF_MT_COUNT			0x18
>  #define MMA8452_TRANSIENT_CFG			0x1d
>  #define  MMA8452_TRANSIENT_CFG_HPF_BYP		BIT(0)
>  #define  MMA8452_TRANSIENT_CFG_CHAN(chan)	BIT(chan + 1)
> @@ -69,6 +79,7 @@
>  #define MMA8452_MAX_REG				0x31
>  
>  #define  MMA8452_INT_DRDY			BIT(0)
> +#define  MMA8452_INT_FF_MT			BIT(2)
>  #define  MMA8452_INT_TRANS			BIT(5)
>  
>  #define  MMA8452_DEVICE_ID			0x2a
> @@ -613,7 +624,8 @@ static int mma8452_write_event_config(struct iio_dev *indio_dev,
>  	else
>  		val &= ~BIT(chan->scan_index + chip->ev_cfg_chan_shift);
>  
> -	val |= MMA8452_TRANSIENT_CFG_ELE;
> +	val |= chip->ev_cfg_ele;
> +	val |= MMA8452_FF_MT_CFG_OAE;
>  
>  	return mma8452_change_config(data, chip->ev_cfg, val);
>  }
> @@ -654,6 +666,7 @@ static irqreturn_t mma8452_interrupt(int irq, void *p)
>  {
>  	struct iio_dev *indio_dev = p;
>  	struct mma8452_data *data = iio_priv(indio_dev);
> +	const struct mma_chip_info *chip = data->chip_info;
>  	int ret = IRQ_NONE;
>  	int src;
>  
> @@ -666,7 +679,10 @@ static irqreturn_t mma8452_interrupt(int irq, void *p)
>  		ret = IRQ_HANDLED;
>  	}
>  
> -	if (src & MMA8452_INT_TRANS) {
> +	if ((src & MMA8452_INT_TRANS &&
> +	     chip->ev_src == MMA8452_TRANSIENT_SRC) ||
> +	    (src & MMA8452_INT_FF_MT &&
> +	     chip->ev_src == MMA8452_FF_MT_SRC)) {
>  		mma8452_transient_interrupt(indio_dev);
>  		ret = IRQ_HANDLED;
>  	}
> @@ -728,6 +744,16 @@ static const struct iio_event_spec mma8452_transient_event[] = {
>  	},
>  };
>  
> +static const struct iio_event_spec mma8452_motion_event[] = {
> +	{
> +		.type = IIO_EV_TYPE_MAG,
> +		.dir = IIO_EV_DIR_RISING,
> +		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
> +		.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
> +					BIT(IIO_EV_INFO_PERIOD)
> +	},
> +};
> +
>  /*
>   * Threshold is configured in fixed 8G/127 steps regardless of
>   * currently selected scale for measurement.
> @@ -1013,13 +1039,15 @@ static int mma8452_probe(struct i2c_client *client,
>  
>  	if (client->irq) {
>  		/*
> -		 * Although we enable the transient interrupt source once and
> -		 * for all here the transient event detection itself is not
> -		 * enabled until userspace asks for it by
> -		 * mma8452_write_event_config()
> +		 * Although we enable the interrupt sources once and for
> +		 * all here the event detection itself is not enabled until
> +		 * userspace asks for it by mma8452_write_event_config()
>  		 */
> -		int supported_interrupts = MMA8452_INT_DRDY | MMA8452_INT_TRANS;
> -		int enabled_interrupts = MMA8452_INT_TRANS;
> +		int supported_interrupts = MMA8452_INT_DRDY |
> +					   MMA8452_INT_TRANS |
> +					   MMA8452_INT_FF_MT;
> +		int enabled_interrupts = MMA8452_INT_TRANS |
> +					 MMA8452_INT_FF_MT;
>  
>  		/* Assume wired to INT1 pin */
>  		ret = i2c_smbus_write_byte_data(client,
> 


WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron <jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Martin Kepplinger
	<martink-1KBjaw7Xf1+zQB+pC5nmwQ@public.gmane.org>,
	knaack.h-Mmb7MZpHnFY@public.gmane.org,
	lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org,
	pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org,
	mfuzzey-mB3Nsq4MPf1BDgjK7y7TUQ@public.gmane.org,
	roberta.dobrescu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	pawel.moll-5wv7dgnIgG8@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
	galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	christoph.muellner-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org,
	Martin Kepplinger
	<martin.kepplinger-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>
Subject: Re: [PATCH 3/6] iio: mma8452: add freefall / motion interrupt source
Date: Sat, 5 Sep 2015 17:58:58 +0100	[thread overview]
Message-ID: <55EB1F52.8000307@kernel.org> (raw)
In-Reply-To: <1441107913-4112-4-git-send-email-martink-1KBjaw7Xf1+zQB+pC5nmwQ@public.gmane.org>

On 01/09/15 12:45, Martin Kepplinger wrote:
> This adds the freefall / motion interrupt source definitions to the driver.
> It is used in this series' next patch, for chips that don't support the
> transient interrupt source.
> 
> Signed-off-by: Martin Kepplinger <martin.kepplinger-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>
> Signed-off-by: Christoph Muellner <christoph.muellner-SN7IsUiht6C/RdPyistoZJqQE7yCjDx5@public.gmane.org>
Looks fine to me.  Will let sit for Peter and others to take a look if they like.

Jonathan
> ---
>  drivers/iio/accel/mma8452.c | 44 ++++++++++++++++++++++++++++++++++++--------
>  1 file changed, 36 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c
> index 7b2ab17..6b1a862 100644
> --- a/drivers/iio/accel/mma8452.c
> +++ b/drivers/iio/accel/mma8452.c
> @@ -42,6 +42,16 @@
>  #define  MMA8452_DATA_CFG_HPF_MASK		BIT(4)
>  #define MMA8452_HP_FILTER_CUTOFF		0x0f
>  #define  MMA8452_HP_FILTER_CUTOFF_SEL_MASK	GENMASK(1, 0)
> +#define MMA8452_FF_MT_CFG			0x15
> +#define  MMA8452_FF_MT_CFG_OAE			BIT(6)
> +#define  MMA8452_FF_MT_CFG_ELE			BIT(7)
> +#define MMA8452_FF_MT_SRC			0x16
> +#define  MMA8452_FF_MT_SRC_XHE			BIT(1)
> +#define  MMA8452_FF_MT_SRC_YHE			BIT(3)
> +#define  MMA8452_FF_MT_SRC_ZHE			BIT(5)
> +#define MMA8452_FF_MT_THS			0x17
> +#define  MMA8452_FF_MT_THS_MASK			0x7f
> +#define MMA8452_FF_MT_COUNT			0x18
>  #define MMA8452_TRANSIENT_CFG			0x1d
>  #define  MMA8452_TRANSIENT_CFG_HPF_BYP		BIT(0)
>  #define  MMA8452_TRANSIENT_CFG_CHAN(chan)	BIT(chan + 1)
> @@ -69,6 +79,7 @@
>  #define MMA8452_MAX_REG				0x31
>  
>  #define  MMA8452_INT_DRDY			BIT(0)
> +#define  MMA8452_INT_FF_MT			BIT(2)
>  #define  MMA8452_INT_TRANS			BIT(5)
>  
>  #define  MMA8452_DEVICE_ID			0x2a
> @@ -613,7 +624,8 @@ static int mma8452_write_event_config(struct iio_dev *indio_dev,
>  	else
>  		val &= ~BIT(chan->scan_index + chip->ev_cfg_chan_shift);
>  
> -	val |= MMA8452_TRANSIENT_CFG_ELE;
> +	val |= chip->ev_cfg_ele;
> +	val |= MMA8452_FF_MT_CFG_OAE;
>  
>  	return mma8452_change_config(data, chip->ev_cfg, val);
>  }
> @@ -654,6 +666,7 @@ static irqreturn_t mma8452_interrupt(int irq, void *p)
>  {
>  	struct iio_dev *indio_dev = p;
>  	struct mma8452_data *data = iio_priv(indio_dev);
> +	const struct mma_chip_info *chip = data->chip_info;
>  	int ret = IRQ_NONE;
>  	int src;
>  
> @@ -666,7 +679,10 @@ static irqreturn_t mma8452_interrupt(int irq, void *p)
>  		ret = IRQ_HANDLED;
>  	}
>  
> -	if (src & MMA8452_INT_TRANS) {
> +	if ((src & MMA8452_INT_TRANS &&
> +	     chip->ev_src == MMA8452_TRANSIENT_SRC) ||
> +	    (src & MMA8452_INT_FF_MT &&
> +	     chip->ev_src == MMA8452_FF_MT_SRC)) {
>  		mma8452_transient_interrupt(indio_dev);
>  		ret = IRQ_HANDLED;
>  	}
> @@ -728,6 +744,16 @@ static const struct iio_event_spec mma8452_transient_event[] = {
>  	},
>  };
>  
> +static const struct iio_event_spec mma8452_motion_event[] = {
> +	{
> +		.type = IIO_EV_TYPE_MAG,
> +		.dir = IIO_EV_DIR_RISING,
> +		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
> +		.mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
> +					BIT(IIO_EV_INFO_PERIOD)
> +	},
> +};
> +
>  /*
>   * Threshold is configured in fixed 8G/127 steps regardless of
>   * currently selected scale for measurement.
> @@ -1013,13 +1039,15 @@ static int mma8452_probe(struct i2c_client *client,
>  
>  	if (client->irq) {
>  		/*
> -		 * Although we enable the transient interrupt source once and
> -		 * for all here the transient event detection itself is not
> -		 * enabled until userspace asks for it by
> -		 * mma8452_write_event_config()
> +		 * Although we enable the interrupt sources once and for
> +		 * all here the event detection itself is not enabled until
> +		 * userspace asks for it by mma8452_write_event_config()
>  		 */
> -		int supported_interrupts = MMA8452_INT_DRDY | MMA8452_INT_TRANS;
> -		int enabled_interrupts = MMA8452_INT_TRANS;
> +		int supported_interrupts = MMA8452_INT_DRDY |
> +					   MMA8452_INT_TRANS |
> +					   MMA8452_INT_FF_MT;
> +		int enabled_interrupts = MMA8452_INT_TRANS |
> +					 MMA8452_INT_FF_MT;
>  
>  		/* Assume wired to INT1 pin */
>  		ret = i2c_smbus_write_byte_data(client,
> 

  reply	other threads:[~2015-09-05 16:59 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-01 11:45 [PATCHv6 0/6] iio: mma8452: improve driver and support more chips Martin Kepplinger
2015-09-01 11:45 ` Martin Kepplinger
2015-09-01 11:45 ` [PATCH 1/6] iio: mma8452: refactor for seperating chip specific data Martin Kepplinger
2015-09-05 16:52   ` Jonathan Cameron
2015-09-05 16:52     ` Jonathan Cameron
2015-09-12 10:07   ` Jonathan Cameron
2015-09-12 10:07     ` Jonathan Cameron
2015-09-01 11:45 ` [PATCH 2/6] iio: mma8452: add support for MMA8453Q accelerometer chip Martin Kepplinger
2015-09-05 16:56   ` Jonathan Cameron
2015-09-05 16:56     ` Jonathan Cameron
2015-09-12 10:07   ` Jonathan Cameron
2015-09-12 10:07     ` Jonathan Cameron
2015-09-01 11:45 ` [PATCH 3/6] iio: mma8452: add freefall / motion interrupt source Martin Kepplinger
2015-09-05 16:58   ` Jonathan Cameron [this message]
2015-09-05 16:58     ` Jonathan Cameron
2015-09-12 10:08   ` Jonathan Cameron
2015-09-12 10:08     ` Jonathan Cameron
2015-09-01 11:45 ` [PATCH 4/6] iio: mma8452: add support for MMA8652FC and MMA8653FC Martin Kepplinger
2015-09-01 11:45   ` Martin Kepplinger
2015-09-05 17:05   ` Jonathan Cameron
2015-09-05 17:05     ` Jonathan Cameron
2015-09-12 10:08   ` Jonathan Cameron
2015-09-12 10:08     ` Jonathan Cameron
2015-09-01 11:45 ` [PATCH 5/6] iio: mma8452: add copyright notice comment Martin Kepplinger
2015-09-01 11:45   ` Martin Kepplinger
2015-09-12 10:09   ` Jonathan Cameron
2015-09-12 10:09     ` Jonathan Cameron
2015-09-01 11:45 ` [PATCH 6/6] iio: mma8452: leave sysfs namings to the iio core Martin Kepplinger
2015-09-01 11:45   ` Martin Kepplinger
2015-09-05 17:07   ` Jonathan Cameron
2015-09-05 17:07     ` Jonathan Cameron
2015-09-12 10:09   ` Jonathan Cameron
2015-09-12 10:09     ` Jonathan Cameron

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=55EB1F52.8000307@kernel.org \
    --to=jic23@kernel.org \
    --cc=christoph.muellner@theobroma-systems.com \
    --cc=devicetree@vger.kernel.org \
    --cc=galak@codeaurora.org \
    --cc=ijc+devicetree@hellion.org.uk \
    --cc=knaack.h@gmx.de \
    --cc=lars@metafoo.de \
    --cc=linux-iio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=martin.kepplinger@theobroma-systems.com \
    --cc=martink@posteo.de \
    --cc=mfuzzey@parkeon.com \
    --cc=pawel.moll@arm.com \
    --cc=pmeerw@pmeerw.net \
    --cc=roberta.dobrescu@gmail.com \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.