From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 5/5] irqchip, gicv3-its: Workaround for Cavium ThunderX errata 22375, 24313
Date: Mon, 07 Sep 2015 17:32:25 +0100 [thread overview]
Message-ID: <55EDBC19.2010301@arm.com> (raw)
In-Reply-To: <1439576885-15621-6-git-send-email-rric@kernel.org>
On 14/08/15 19:28, Robert Richter wrote:
> From: Robert Richter <rrichter@cavium.com>
>
> This implements two gicv3-its errata workarounds for ThunderX. Both
> with small impact affecting only ITS table allocation.
>
> erratum 22375: only alloc 8MB table size
> erratum 24313: ignore memory access type
>
> The fixes are in ITS initialization and basically ignore memory access
> type and table size provided by the TYPER and BASER registers.
>
> v3:
> * fix erratum to be dependend from iidr
>
> Signed-off-by: Robert Richter <rrichter@cavium.com>
> ---
> drivers/irqchip/irq-gic-v3-its.c | 35 +++++++++++++++++++++++++++++++----
> 1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 697421e834ee..30459df2ee2c 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -39,7 +39,8 @@
> #include "irq-gic-common.h"
> #include "irqchip.h"
>
> -#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1 << 0)
> +#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0)
> +#define ITS_FLAGS_CAVIUM_THUNDERX (1ULL << 1)
I think you might need something slightly more explicit, as I'd expect
some ulterior revision of ThunderX to be eventually fixed...
ITS_FLAGS_THUNDERX_BOGUS_TYPER? Or something based on the errata numbers?
>
> #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
>
> @@ -803,9 +804,22 @@ static int its_alloc_tables(struct its_node *its)
> int i;
> int psz = SZ_64K;
> u64 shr = GITS_BASER_InnerShareable;
> - u64 cache = GITS_BASER_WaWb;
> - u64 typer = readq_relaxed(its->base + GITS_TYPER);
> - u32 ids = GITS_TYPER_DEVBITS(typer);
> + u64 cache;
> + u64 typer;
> + u32 ids;
> +
> + if (its->flags & ITS_FLAGS_CAVIUM_THUNDERX) {
> + /*
> + * erratum 22375: only alloc 8MB table size
> + * erratum 24313: ignore memory access type
> + */
> + cache = 0;
> + ids = 0x13; /* 20 bits, 8MB */
> + } else {
You can move the typer definition here, as it is only used here.
> + cache = GITS_BASER_WaWb;
> + typer = readq_relaxed(its->base + GITS_TYPER);
> + ids = GITS_TYPER_DEVBITS(typer);
> + }
>
> for (i = 0; i < GITS_BASER_NR_REGS; i++) {
> u64 val = readq_relaxed(its->base + GITS_BASER + i * 8);
> @@ -1391,8 +1405,21 @@ static int its_force_quiescent(void __iomem *base)
> }
> }
>
> +static void its_enable_cavium_thunderx(void *data)
> +{
> + struct its_node *its = data;
> +
> + its->flags |= ITS_FLAGS_CAVIUM_THUNDERX;
> +}
> +
> static const struct gic_capabilities its_errata[] = {
> {
> + .desc = "ITS: Cavium errata 22375, 24313",
> + .iidr = 0xa100034c, /* ThunderX pass 1.x */
> + .mask = 0xffff0fff,
> + .init = its_enable_cavium_thunderx,
> + },
> + {
> }
> };
>
>
Otherwise looks OK to me.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Robert Richter <rric@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Robert Richter <rrichter@cavium.com>
Subject: Re: [PATCH v4 5/5] irqchip, gicv3-its: Workaround for Cavium ThunderX errata 22375, 24313
Date: Mon, 07 Sep 2015 17:32:25 +0100 [thread overview]
Message-ID: <55EDBC19.2010301@arm.com> (raw)
In-Reply-To: <1439576885-15621-6-git-send-email-rric@kernel.org>
On 14/08/15 19:28, Robert Richter wrote:
> From: Robert Richter <rrichter@cavium.com>
>
> This implements two gicv3-its errata workarounds for ThunderX. Both
> with small impact affecting only ITS table allocation.
>
> erratum 22375: only alloc 8MB table size
> erratum 24313: ignore memory access type
>
> The fixes are in ITS initialization and basically ignore memory access
> type and table size provided by the TYPER and BASER registers.
>
> v3:
> * fix erratum to be dependend from iidr
>
> Signed-off-by: Robert Richter <rrichter@cavium.com>
> ---
> drivers/irqchip/irq-gic-v3-its.c | 35 +++++++++++++++++++++++++++++++----
> 1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index 697421e834ee..30459df2ee2c 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -39,7 +39,8 @@
> #include "irq-gic-common.h"
> #include "irqchip.h"
>
> -#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1 << 0)
> +#define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0)
> +#define ITS_FLAGS_CAVIUM_THUNDERX (1ULL << 1)
I think you might need something slightly more explicit, as I'd expect
some ulterior revision of ThunderX to be eventually fixed...
ITS_FLAGS_THUNDERX_BOGUS_TYPER? Or something based on the errata numbers?
>
> #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0)
>
> @@ -803,9 +804,22 @@ static int its_alloc_tables(struct its_node *its)
> int i;
> int psz = SZ_64K;
> u64 shr = GITS_BASER_InnerShareable;
> - u64 cache = GITS_BASER_WaWb;
> - u64 typer = readq_relaxed(its->base + GITS_TYPER);
> - u32 ids = GITS_TYPER_DEVBITS(typer);
> + u64 cache;
> + u64 typer;
> + u32 ids;
> +
> + if (its->flags & ITS_FLAGS_CAVIUM_THUNDERX) {
> + /*
> + * erratum 22375: only alloc 8MB table size
> + * erratum 24313: ignore memory access type
> + */
> + cache = 0;
> + ids = 0x13; /* 20 bits, 8MB */
> + } else {
You can move the typer definition here, as it is only used here.
> + cache = GITS_BASER_WaWb;
> + typer = readq_relaxed(its->base + GITS_TYPER);
> + ids = GITS_TYPER_DEVBITS(typer);
> + }
>
> for (i = 0; i < GITS_BASER_NR_REGS; i++) {
> u64 val = readq_relaxed(its->base + GITS_BASER + i * 8);
> @@ -1391,8 +1405,21 @@ static int its_force_quiescent(void __iomem *base)
> }
> }
>
> +static void its_enable_cavium_thunderx(void *data)
> +{
> + struct its_node *its = data;
> +
> + its->flags |= ITS_FLAGS_CAVIUM_THUNDERX;
> +}
> +
> static const struct gic_capabilities its_errata[] = {
> {
> + .desc = "ITS: Cavium errata 22375, 24313",
> + .iidr = 0xa100034c, /* ThunderX pass 1.x */
> + .mask = 0xffff0fff,
> + .init = its_enable_cavium_thunderx,
> + },
> + {
> }
> };
>
>
Otherwise looks OK to me.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2015-09-07 16:32 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-14 18:28 [PATCH v4 0/5] irqchip, gicv3: Updates and Cavium ThunderX errata workarounds Robert Richter
2015-08-14 18:28 ` Robert Richter
2015-08-14 18:28 ` [PATCH v4 1/5] irqchip, gicv3-its: Add range check for number of allocated pages Robert Richter
2015-08-14 18:28 ` Robert Richter
2015-08-14 18:28 ` [PATCH v4 2/5] irqchip, gicv3: Workaround for Cavium ThunderX erratum 23154 Robert Richter
2015-08-14 18:28 ` Robert Richter
2015-08-17 16:40 ` Catalin Marinas
2015-08-17 16:40 ` Catalin Marinas
2015-08-19 15:43 ` Robert Richter
2015-08-19 15:43 ` Robert Richter
2015-08-17 17:00 ` David Daney
2015-08-17 17:00 ` David Daney
2015-08-19 16:05 ` Robert Richter
2015-08-19 16:05 ` Robert Richter
2015-09-07 16:54 ` Suzuki K. Poulose
2015-09-07 16:54 ` Suzuki K. Poulose
2015-09-07 17:09 ` Marc Zyngier
2015-09-07 17:09 ` Marc Zyngier
2015-09-07 17:32 ` Robert Richter
2015-09-07 17:32 ` Robert Richter
2015-09-07 17:15 ` Catalin Marinas
2015-09-07 17:15 ` Catalin Marinas
2015-09-07 17:41 ` Suzuki K. Poulose
2015-09-07 17:41 ` Suzuki K. Poulose
2015-09-08 9:00 ` Catalin Marinas
2015-09-08 9:00 ` Catalin Marinas
2015-09-08 9:09 ` Suzuki K. Poulose
2015-09-08 9:09 ` Suzuki K. Poulose
2015-09-08 9:37 ` Catalin Marinas
2015-09-08 9:37 ` Catalin Marinas
2015-09-08 10:30 ` Suzuki K. Poulose
2015-09-08 10:30 ` Suzuki K. Poulose
2015-08-14 18:28 ` [PATCH v4 3/5] irqchip, gicv3-its: Read typer register outside the loop Robert Richter
2015-08-14 18:28 ` Robert Richter
2015-08-14 18:28 ` [PATCH v4 4/5] irqchip, gicv3-its: Add HW revision detection and configuration Robert Richter
2015-08-14 18:28 ` Robert Richter
2015-09-07 16:26 ` Marc Zyngier
2015-09-07 16:26 ` Marc Zyngier
2015-08-14 18:28 ` [PATCH v4 5/5] irqchip, gicv3-its: Workaround for Cavium ThunderX errata 22375, 24313 Robert Richter
2015-08-14 18:28 ` Robert Richter
2015-09-07 16:32 ` Marc Zyngier [this message]
2015-09-07 16:32 ` Marc Zyngier
2015-09-18 8:33 ` Robert Richter
2015-09-18 8:33 ` Robert Richter
2015-09-07 16:35 ` [PATCH v4 0/5] irqchip, gicv3: Updates and Cavium ThunderX errata workarounds Marc Zyngier
2015-09-07 16:35 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=55EDBC19.2010301@arm.com \
--to=marc.zyngier@arm.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.