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From: Julien Grall <julien.grall@citrix.com>
To: Ian Campbell <ian.campbell@citrix.com>,
	Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: xen-devel@lists.xenproject.org
Subject: Re: [PATCH v3 7/9] xen/arm: vgic: Optimize the way to store the target vCPU in the rank
Date: Thu, 8 Oct 2015 19:36:49 +0100	[thread overview]
Message-ID: <5616B7C1.8070503@citrix.com> (raw)
In-Reply-To: <1444314312.1410.206.camel@citrix.com>

On 08/10/15 15:25, Ian Campbell wrote:
>> If the concern is the behavior is changed, I'm happy to rework this code
>> to keep exactly the same behavior. I.e any 32-bit write containing
>> a 0 byte will be ignored. This is not optimal but at least I'm not
>> opening the pandora box of fixing every single error in the code touch
>> by this series.
> 
> I'm okay with the new behaviour, I think Stefano was willing to tolerate it
> (based on <alpine.DEB.2.02.1510081220190.1179@kaball.uk.xensource.com>).

It's what I understand too. I will a resend a new version tomorrow.

> So if we aren't going to fix it to DTRT WRT writing zero to a target then I
> think we can go with the current variant and not change to ignoring any
> word with a zero byte in it.

I'm thinking to split this patch in two:
	- One which will turn the current ITARGETSR emulation in a function
with the change of behavior when writing zero to a target.
        - The other to optimize the way we store the target.

This will keep the second patch nearly mechanical and avoid to change
multiple behavior within the same patch.

Regards,

-- 
Julien Grall

  reply	other threads:[~2015-10-08 18:38 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-07 14:41 [PATCH v3 0/9] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-10-07 14:41 ` [PATCH v3 1/9] xen/arm: io: remove mmio_check_t typedef Julien Grall
2015-10-07 14:41 ` [PATCH v3 2/9] xen/arm: io: Extend write/read handler to pass the register in parameter Julien Grall
2015-10-07 14:41 ` [PATCH v3 3/9] xen/arm: io: Support sign-extension for every read access Julien Grall
2015-10-07 14:41 ` [PATCH v3 4/9] xen/arm: vgic: ctlr stores a 32-bit hardware register so use uint32_t Julien Grall
2015-10-07 14:41 ` [PATCH v3 5/9] xen/arm: vgic: Optimize the way to store GICD_IPRIORITYR in the rank Julien Grall
2015-10-07 14:41 ` [PATCH v3 6/9] xen/arm: vgic: Introduce a new field to store the rank index and use it Julien Grall
2015-10-07 14:41 ` [PATCH v3 7/9] xen/arm: vgic: Optimize the way to store the target vCPU in the rank Julien Grall
2015-10-07 15:38   ` Ian Campbell
2015-10-07 15:48     ` Julien Grall
2015-10-07 16:00       ` Ian Campbell
2015-10-07 16:29         ` Julien Grall
2015-10-07 19:13           ` Julien Grall
2015-10-08  9:39             ` Ian Campbell
2015-10-08 10:43               ` Julien Grall
2015-10-07 17:26   ` Stefano Stabellini
2015-10-07 18:16     ` Julien Grall
2015-10-08 10:56       ` Ian Campbell
2015-10-08 11:36         ` Stefano Stabellini
2015-10-08 12:23           ` Ian Campbell
2015-10-08 12:34             ` Stefano Stabellini
2015-10-08 13:46             ` Julien Grall
2015-10-08 14:25               ` Ian Campbell
2015-10-08 18:36                 ` Julien Grall [this message]
2015-10-09 11:24                   ` Julien Grall
2015-10-09 11:38                     ` Ian Campbell
2015-10-12 10:41                 ` Stefano Stabellini
2015-10-12 11:00                   ` Julien Grall
2015-10-12 11:07                     ` Stefano Stabellini
2015-10-12 11:28                       ` Julien Grall
2015-10-07 14:41 ` [PATCH v3 8/9] xen/arm: vgic: Introduce helpers to extract/update/clear/set vGIC register Julien Grall
2015-10-07 14:41 ` [PATCH v3 9/9] xen/arm: vgic-v3: Support 32-bit access for 64-bit registers Julien Grall
2015-10-08 10:44 ` [PATCH v3 0/9] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-10-08 11:46   ` Ian Campbell

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