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From: Suzuki.Poulose@arm.com (Suzuki K. Poulose)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv3 03/11] arm64: Introduce helpers for page table levels
Date: Thu, 15 Oct 2015 14:48:47 +0100	[thread overview]
Message-ID: <561FAEBF.2090508@arm.com> (raw)
In-Reply-To: <20151015133001.GF21930@cbox>

On 15/10/15 14:30, Christoffer Dall wrote:
> On Thu, Oct 15, 2015 at 02:14:22PM +0100, Suzuki K. Poulose wrote:
>> On 15/10/15 13:44, Mark Rutland wrote:
>>> On Thu, Oct 15, 2015 at 01:37:35PM +0200, Christoffer Dall wrote:
>>>> On Wed, Oct 14, 2015 at 12:20:26PM +0100, Suzuki K. Poulose wrote:


>>   * The maximum number of levels supported by the architecture is 4. Hence at starting
>>   * at level n, we hanve (4 - n) levels of translation. So, the total number of bits
>
> nit: s/hanve/have/

Fixed.

>
>>   * mapped by an entry at level n is :
>>   *
>>   *  ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT
>>   *
>>   * Rearranging it a bit we get :
>>   *   (4 - n) * (PAGE_SHIFT - 3) + 3
>>   */
>>
>> Or we could use the formula without rearranging.
>>
> Either way, even I get it now.
>
> Thanks for the explanation!!

:). I was involved too much in these calculations that, the formula looked
obvious to me, when I wrote it. But yes, I did realise that it is indeed
complicated, once I really started looking at explaining why I wrote it so.
Thanks for being patient :) and complaining peacefully !

Btw, I have a revised (hopefully better) version here :

/*
  * Size mapped by an entry at level n ( 0 <= n <= 3)
  * We map (PAGE_SHIFT - 3) at all translation levels and PAGE_SHIFT bits
  * in the final page. The maximum number of translation levels supported by
  * the architecture is 4. Hence, starting at at level n, we have further
  * ((4 - n) - 1) levels of translation excluding the offset within the page.
  * So, the total number of bits mapped by an entry@level n is :
  *
  *  ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT
  *
  * Rearranging it a bit we get :
  *   (4 - n) * (PAGE_SHIFT - 3) + 3
  */


>
> Assuming some version of this goes in:
>
> Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
>

Thanks. I lost two interview questions though ;)

Suzuki

WARNING: multiple messages have this Message-ID (diff)
From: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
To: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, catalin.marinas@arm.com,
	will.deacon@arm.com, steve.capper@linaro.org,
	marc.zyngier@arm.com, ard.biesheuvel@linaro.org
Subject: Re: [PATCHv3 03/11] arm64: Introduce helpers for page table levels
Date: Thu, 15 Oct 2015 14:48:47 +0100	[thread overview]
Message-ID: <561FAEBF.2090508@arm.com> (raw)
In-Reply-To: <20151015133001.GF21930@cbox>

On 15/10/15 14:30, Christoffer Dall wrote:
> On Thu, Oct 15, 2015 at 02:14:22PM +0100, Suzuki K. Poulose wrote:
>> On 15/10/15 13:44, Mark Rutland wrote:
>>> On Thu, Oct 15, 2015 at 01:37:35PM +0200, Christoffer Dall wrote:
>>>> On Wed, Oct 14, 2015 at 12:20:26PM +0100, Suzuki K. Poulose wrote:


>>   * The maximum number of levels supported by the architecture is 4. Hence at starting
>>   * at level n, we hanve (4 - n) levels of translation. So, the total number of bits
>
> nit: s/hanve/have/

Fixed.

>
>>   * mapped by an entry at level n is :
>>   *
>>   *  ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT
>>   *
>>   * Rearranging it a bit we get :
>>   *   (4 - n) * (PAGE_SHIFT - 3) + 3
>>   */
>>
>> Or we could use the formula without rearranging.
>>
> Either way, even I get it now.
>
> Thanks for the explanation!!

:). I was involved too much in these calculations that, the formula looked
obvious to me, when I wrote it. But yes, I did realise that it is indeed
complicated, once I really started looking at explaining why I wrote it so.
Thanks for being patient :) and complaining peacefully !

Btw, I have a revised (hopefully better) version here :

/*
  * Size mapped by an entry at level n ( 0 <= n <= 3)
  * We map (PAGE_SHIFT - 3) at all translation levels and PAGE_SHIFT bits
  * in the final page. The maximum number of translation levels supported by
  * the architecture is 4. Hence, starting at at level n, we have further
  * ((4 - n) - 1) levels of translation excluding the offset within the page.
  * So, the total number of bits mapped by an entry at level n is :
  *
  *  ((4 - n) - 1) * (PAGE_SHIFT - 3) + PAGE_SHIFT
  *
  * Rearranging it a bit we get :
  *   (4 - n) * (PAGE_SHIFT - 3) + 3
  */


>
> Assuming some version of this goes in:
>
> Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
>

Thanks. I lost two interview questions though ;)

Suzuki


  reply	other threads:[~2015-10-15 13:48 UTC|newest]

Thread overview: 110+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-14 11:20 [PATCHv3 00/11] arm64: 16K translation granule support Suzuki K. Poulose
2015-10-14 11:20 ` Suzuki K. Poulose
2015-10-14 11:20 ` [PATCHv3 01/11] arm64: Move swapper pagetable definitions Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 11:42   ` Mark Rutland
2015-10-14 11:42     ` Mark Rutland
2015-10-14 12:41     ` Suzuki K. Poulose
2015-10-14 12:41       ` Suzuki K. Poulose
2015-10-14 11:20 ` [PATCHv3 02/11] arm64: Handle section maps for swapper/idmap Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 12:06   ` Mark Rutland
2015-10-14 12:06     ` Mark Rutland
2015-10-14 13:21     ` Suzuki K. Poulose
2015-10-14 13:21       ` Suzuki K. Poulose
2015-10-14 14:51       ` Mark Rutland
2015-10-14 14:51         ` Mark Rutland
2015-10-14 15:08         ` Suzuki K. Poulose
2015-10-14 15:08           ` Suzuki K. Poulose
2015-10-14 15:14           ` Mark Rutland
2015-10-14 15:14             ` Mark Rutland
2015-10-14 11:20 ` [PATCHv3 03/11] arm64: Introduce helpers for page table levels Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 17:07   ` Mark Rutland
2015-10-14 17:07     ` Mark Rutland
2015-10-15  9:35     ` Suzuki K. Poulose
2015-10-15  9:35       ` Suzuki K. Poulose
2015-10-15 10:37       ` Mark Rutland
2015-10-15 10:37         ` Mark Rutland
2015-10-15 11:40       ` Christoffer Dall
2015-10-15 11:40         ` Christoffer Dall
2015-10-15 11:37   ` Christoffer Dall
2015-10-15 11:37     ` Christoffer Dall
2015-10-15 12:44     ` Mark Rutland
2015-10-15 12:44       ` Mark Rutland
2015-10-15 13:14       ` Suzuki K. Poulose
2015-10-15 13:14         ` Suzuki K. Poulose
2015-10-15 13:30         ` Christoffer Dall
2015-10-15 13:30           ` Christoffer Dall
2015-10-15 13:48           ` Suzuki K. Poulose [this message]
2015-10-15 13:48             ` Suzuki K. Poulose
2015-10-15 14:15             ` Christoffer Dall
2015-10-15 14:15               ` Christoffer Dall
2015-10-14 11:20 ` [PATCHv3 04/11] arm64: Calculate size for idmap_pg_dir at compile time Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 17:12   ` Mark Rutland
2015-10-14 17:12     ` Mark Rutland
2015-10-14 11:20 ` [PATCHv3 05/11] arm64: Handle 4 level page table for swapper Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 17:15   ` Mark Rutland
2015-10-14 17:15     ` Mark Rutland
2015-10-14 11:20 ` [PATCHv3 06/11] arm64: Clean config usages for page size Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 11:20 ` [PATCHv3 07/11] arm64: Kconfig: Fix help text about AArch32 support with 64K pages Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 17:16   ` Mark Rutland
2015-10-14 17:16     ` Mark Rutland
2015-10-14 11:20 ` [PATCHv3 08/11] arm64: Check for selected granule support Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 17:24   ` Mark Rutland
2015-10-14 17:24     ` Mark Rutland
2015-10-14 17:32     ` Mark Rutland
2015-10-14 17:32       ` Mark Rutland
2015-10-15  9:45     ` Suzuki K. Poulose
2015-10-15  9:45       ` Suzuki K. Poulose
2015-10-15 10:39       ` Mark Rutland
2015-10-15 10:39         ` Mark Rutland
2015-10-14 21:13   ` Jeremy Linton
2015-10-14 21:13     ` Jeremy Linton
2015-10-15  9:48     ` Suzuki K. Poulose
2015-10-15  9:48       ` Suzuki K. Poulose
2015-10-15 10:45     ` Mark Rutland
2015-10-15 10:45       ` Mark Rutland
2015-10-15 11:25       ` Suzuki K. Poulose
2015-10-15 11:25         ` Suzuki K. Poulose
2015-10-15 12:37         ` Mark Rutland
2015-10-15 12:37           ` Mark Rutland
2015-10-15 12:58           ` Suzuki K. Poulose
2015-10-15 12:58             ` Suzuki K. Poulose
2015-10-16  8:03             ` Ard Biesheuvel
2015-10-16  8:03               ` Ard Biesheuvel
2015-10-15 14:47         ` Jeremy Linton
2015-10-15 14:47           ` Jeremy Linton
2015-10-15 15:02           ` Suzuki K. Poulose
2015-10-15 15:02             ` Suzuki K. Poulose
2015-10-15 15:11           ` Mark Rutland
2015-10-15 15:11             ` Mark Rutland
2015-10-16  8:11             ` Ard Biesheuvel
2015-10-16  8:11               ` Ard Biesheuvel
2015-10-14 11:20 ` [PATCHv3 09/11] arm64: Add page size to the kernel image header Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 17:27   ` Mark Rutland
2015-10-14 17:27     ` Mark Rutland
2015-10-15  9:19     ` Suzuki K. Poulose
2015-10-15  9:19       ` Suzuki K. Poulose
2015-10-14 11:20 ` [PATCHv3 10/11] arm64: Add 16K page size support Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose
2015-10-14 15:40   ` Jeremy Linton
2015-10-14 15:40     ` Jeremy Linton
2015-10-14 15:53     ` Suzuki K. Poulose
2015-10-14 15:53       ` Suzuki K. Poulose
2015-10-15 14:06   ` Mark Rutland
2015-10-15 14:06     ` Mark Rutland
2015-10-15 14:48     ` Suzuki K. Poulose
2015-10-15 14:48       ` Suzuki K. Poulose
2015-10-15 15:36       ` Steve Capper
2015-10-15 15:36         ` Steve Capper
2015-10-15 15:48         ` Suzuki K. Poulose
2015-10-15 15:48           ` Suzuki K. Poulose
2015-10-14 11:20 ` [PATCHv3 11/11] arm64: 36 bit VA Suzuki K. Poulose
2015-10-14 11:20   ` Suzuki K. Poulose

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