From: Kai Huang <kai.huang@linux.intel.com>
To: jbeulich@suse.com, andrew.cooper3@citrix.com,
george.dunlap@eu.citrix.com, kevin.tian@intel.com,
jun.nakajima@intel.com, xen-devel@lists.xen.org
Subject: Re: [PATCH 0/2] Deter enabling of EPT A/D bit plus coding style fix
Date: Tue, 20 Oct 2015 18:44:14 +0800 [thread overview]
Message-ID: <56261AFE.9030003@linux.intel.com> (raw)
In-Reply-To: <1445308486-25132-1-git-send-email-kai.huang@linux.intel.com>
Hi Kevin,
Would you comment on the two patches?
Thanks,
-Kai
On 10/20/2015 10:34 AM, Kai Huang wrote:
> Patch 1 is the v2 of defering enabling of EPT A/D bit until PML get enabled,
> with comments from Jan in v1 addressed. Patch 2 is coding style fix of
> for_each_vcpu to existing PML functions according to Jan.
>
> Kai Huang (2):
> x86/ept: defer enabling of EPT A/D bit until PML get enabled.
> x86/vmx: fix coding style of PML functions
>
> xen/arch/x86/hvm/vmx/vmcs.c | 32 ++++++++++++++++++++++++++++----
> xen/arch/x86/mm/p2m-ept.c | 24 ++++++++++++++++++++----
> xen/include/asm-x86/hvm/vmx/vmcs.h | 2 ++
> 3 files changed, 50 insertions(+), 8 deletions(-)
>
prev parent reply other threads:[~2015-10-20 10:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-20 2:34 [PATCH 0/2] Deter enabling of EPT A/D bit plus coding style fix Kai Huang
2015-10-20 2:34 ` [PATCH 1/2] x86/ept: defer enabling of EPT A/D bit until PML get enabled Kai Huang
2015-10-20 9:46 ` Jan Beulich
2015-10-20 10:01 ` Andrew Cooper
2015-10-21 3:00 ` Tian, Kevin
2015-10-20 2:34 ` [PATCH 2/2] x86/vmx: fix coding style of PML functions Kai Huang
2015-10-20 10:01 ` Andrew Cooper
2015-10-21 3:00 ` Tian, Kevin
2015-10-20 10:44 ` Kai Huang [this message]
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