From: puck.chen@hisilicon.com (chenfeng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform
Date: Fri, 23 Oct 2015 17:10:31 +0800 [thread overview]
Message-ID: <5629F987.3060701@hisilicon.com> (raw)
In-Reply-To: <56265783.5040406@arm.com>
Hi Robin,
On 2015/10/20 23:02, Robin Murphy wrote:
> On 20/10/15 09:45, Chen Feng wrote:
>> iommu/hisilicon: Add hi6220-SoC smmu driver
>
>> +
>> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain,
>> + struct device *dev)
>> +{
>> + dev->archdata.iommu = &iova_allocator;
>
> If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once.
>
>> + return 0;
>> +}
>> +
I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"?
> Robin.
>
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: chenfeng <puck.chen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
To: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>,
yudongbin-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
saberlily.xia-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
suzhuangluan-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
kong.kongxinwei-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
z.liuxinliang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
puck.chen-Dw/NWeUnuQfQT0dZR+AlfA@public.gmane.org,
weidong2-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
w.f-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org,
galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: dan.zhao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
peter.panshilin-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
qijiwen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org
Subject: Re: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform
Date: Fri, 23 Oct 2015 17:10:31 +0800 [thread overview]
Message-ID: <5629F987.3060701@hisilicon.com> (raw)
In-Reply-To: <56265783.5040406-5wv7dgnIgG8@public.gmane.org>
Hi Robin,
On 2015/10/20 23:02, Robin Murphy wrote:
> On 20/10/15 09:45, Chen Feng wrote:
>> iommu/hisilicon: Add hi6220-SoC smmu driver
>
>> +
>> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain,
>> + struct device *dev)
>> +{
>> + dev->archdata.iommu = &iova_allocator;
>
> If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once.
>
>> + return 0;
>> +}
>> +
I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"?
> Robin.
>
>
> .
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: chenfeng <puck.chen@hisilicon.com>
To: Robin Murphy <robin.murphy@arm.com>, <yudongbin@hisilicon.com>,
<saberlily.xia@hisilicon.com>, <suzhuangluan@hisilicon.com>,
<kong.kongxinwei@hisilicon.com>, <xuyiping@hisilicon.com>,
<z.liuxinliang@hisilicon.com>, <puck.chen@aliyun.com>,
<weidong2@hisilicon.com>, <w.f@huawei.com>, <joro@8bytes.org>,
<robh+dt@kernel.org>, <pawel.moll@arm.com>,
<mark.rutland@arm.com>, <ijc+devicetree@hellion.org.uk>,
<galak@codeaurora.org>, <linux-kernel@vger.kernel.org>,
<xuwei5@hisilicon.com>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
Cc: <dan.zhao@hisilicon.com>, <peter.panshilin@hisilicon.com>,
<qijiwen@hisilicon.com>, <linuxarm@huawei.com>
Subject: Re: [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform
Date: Fri, 23 Oct 2015 17:10:31 +0800 [thread overview]
Message-ID: <5629F987.3060701@hisilicon.com> (raw)
In-Reply-To: <56265783.5040406@arm.com>
Hi Robin,
On 2015/10/20 23:02, Robin Murphy wrote:
> On 20/10/15 09:45, Chen Feng wrote:
>> iommu/hisilicon: Add hi6220-SoC smmu driver
>
>> +
>> +static int hi6220_smmu_attach_dev(struct iommu_domain *domain,
>> + struct device *dev)
>> +{
>> + dev->archdata.iommu = &iova_allocator;
>
> If the hardware doesn't offer any kind of device isolation (i.e. multiple translation contexts), then you should probably have more logic here to ensure only a single domain can ever be active at once.
>
>> + return 0;
>> +}
>> +
I feel confused about your above comments. Could you help explain "ensure only a single domain can ever be active at once"?
> Robin.
>
>
> .
>
next prev parent reply other threads:[~2015-10-23 9:10 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-20 8:45 [PATCH V2 1/3] Documentation for system mmu in hi6220 platform Chen Feng
2015-10-20 8:45 ` Chen Feng
2015-10-20 8:45 ` Chen Feng
2015-10-20 8:45 ` [PATCH V2 2/3] Add iommu driver for hi6220 SoC platform Chen Feng
2015-10-20 8:45 ` Chen Feng
2015-10-20 8:45 ` Chen Feng
2015-10-20 15:02 ` Robin Murphy
2015-10-20 15:02 ` Robin Murphy
2015-10-20 15:02 ` Robin Murphy
2015-10-21 1:56 ` chenfeng
2015-10-21 1:56 ` chenfeng
2015-10-21 1:56 ` chenfeng
2015-10-23 9:10 ` chenfeng [this message]
2015-10-23 9:10 ` chenfeng
2015-10-23 9:10 ` chenfeng
2015-10-20 8:45 ` [PATCH V2 3/3] Add dts node for smmu on hi6220 SoC Chen Feng
2015-10-20 8:45 ` Chen Feng
2015-10-20 8:45 ` Chen Feng
2015-10-20 9:00 ` Arnd Bergmann
2015-10-20 9:00 ` Arnd Bergmann
2015-10-20 10:17 ` chenfeng
2015-10-20 10:17 ` chenfeng
2015-10-20 10:17 ` chenfeng
2015-10-20 10:34 ` [PATCH V2 1/3] Documentation for system mmu in hi6220 platform Mark Rutland
2015-10-20 10:34 ` Mark Rutland
2015-10-20 10:34 ` Mark Rutland
2015-10-20 12:33 ` chenfeng
2015-10-20 12:33 ` chenfeng
2015-10-20 12:33 ` chenfeng
2015-10-22 1:15 ` Rob Herring
2015-10-22 1:15 ` Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5629F987.3060701@hisilicon.com \
--to=puck.chen@hisilicon.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.