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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/14] drm/i915: Check for CPT and not !IBX in ironlake_disable_pch_transcoder()
Date: Thu, 29 Oct 2015 12:37:33 -0700	[thread overview]
Message-ID: <5632757D.1040706@virtuousgeek.org> (raw)
In-Reply-To: <1446146763-31821-8-git-send-email-ville.syrjala@linux.intel.com>

On 10/29/2015 12:25 PM, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> ironlake_enaable_pch_transcoder() checks for CPT to see if it should
> enable the timing override chicken bit, but
> ironlake_disable_pch_transcoder() checks for !IBX to see if it should
> clear the same bit. Change ironlake_disable_pch_transcoder() to check
> for CPT as well to keep the two sides consistent.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index e820147..0d87a4e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2068,7 +2068,7 @@ static void ironlake_disable_pch_transcoder(struct drm_i915_private *dev_priv,
>  	if (wait_for((I915_READ(reg) & TRANS_STATE_ENABLE) == 0, 50))
>  		DRM_ERROR("failed to disable transcoder %c\n", pipe_name(pipe));
>  
> -	if (!HAS_PCH_IBX(dev)) {
> +	if (HAS_PCH_CPT(dev)) {
>  		/* Workaround: Clear the timing override chicken bit again. */
>  		reg = TRANS_CHICKEN2(pipe);
>  		val = I915_READ(reg);
> 

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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  reply	other threads:[~2015-10-29 19:36 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-29 19:25 [PATCH 00/14] drm/i915: FIFO underrun elimination for PCH platforms ville.syrjala
2015-10-29 19:25 ` [PATCH 01/14] drm/i915: Don't use intel_pipe_to_cpu_transcoder() when there's a pipe config around ville.syrjala
2015-10-29 19:34   ` Jesse Barnes
2015-10-29 19:25 ` [PATCH 02/14] drm/i915: Set sync polarity from adjusted mode for TRANS_DP_CTL ville.syrjala
2015-10-29 19:33   ` Jesse Barnes
2015-10-29 19:25 ` [PATCH 03/14] drm/i915: Enable PCH FIFO underruns later on ILK/SNB/IVB ville.syrjala
2015-10-29 19:34   ` Jesse Barnes
2015-10-29 19:57   ` Paulo Zanoni
2015-10-29 21:21     ` Ville Syrjälä
2015-10-30 15:42       ` Daniel Vetter
2015-10-30 10:06   ` Jani Nikula
2015-10-30 12:08     ` Ville Syrjälä
2015-10-30 12:31       ` Jani Nikula
2015-10-30 15:41       ` Daniel Vetter
2015-10-30 17:20   ` [PATCH v2 " ville.syrjala
2015-10-29 19:25 ` [PATCH 04/14] drm/i915: Enable PCH FIFO underruns later on HSW+ ville.syrjala
2015-10-29 19:34   ` Jesse Barnes
2015-10-29 19:25 ` [PATCH 05/14] drm/i915: Re-enable PCH FIO underrun reporting after pipe has been disabled ville.syrjala
2015-10-29 19:36   ` Jesse Barnes
2015-10-29 21:39     ` Ville Syrjälä
2015-10-30 17:21   ` [PATCH v2 " ville.syrjala
2015-10-29 19:25 ` [PATCH 06/14] drm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPT ville.syrjala
2015-10-30 15:45   ` Daniel Vetter
2015-10-30 17:22   ` [PATCH v2 " ville.syrjala
2015-10-29 19:25 ` [PATCH 07/14] drm/i915: Check for CPT and not !IBX in ironlake_disable_pch_transcoder() ville.syrjala
2015-10-29 19:37   ` Jesse Barnes [this message]
2015-10-29 19:25 ` [PATCH 08/14] drm/i915: Disable FIFO underrun reporting around IBX transcoder B workaround ville.syrjala
2015-10-29 19:38   ` Jesse Barnes
2015-10-30 10:11   ` Jani Nikula
2015-10-30 12:15     ` Ville Syrjälä
2015-10-30 17:23   ` [PATCH v2 " ville.syrjala
2015-10-29 19:25 ` [PATCH 09/14] drm/i915: Hide underruns from eDP PLL and port enable on ILK ville.syrjala
2015-10-29 19:39   ` Jesse Barnes
2015-10-29 21:33     ` Ville Syrjälä
2015-10-29 19:25 ` [PATCH 10/14] drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/ ville.syrjala
2015-10-30 15:49   ` Daniel Vetter
2015-10-29 19:26 ` [PATCH 11/14] drm/i915: Remove ILK-A eDP PLL workaround notes ville.syrjala
2015-10-29 19:40   ` Jesse Barnes
2015-10-29 19:26 ` [PATCH 12/14] drm/i915: Clean up eDP PLL state asserts ville.syrjala
2015-10-30 15:53   ` Daniel Vetter
2015-10-29 19:26 ` [PATCH 13/14] drm/i915: Use intel_dp->DP in eDP PLL setup ville.syrjala
2015-10-30 16:00   ` Daniel Vetter
2015-10-30 16:36     ` Ville Syrjälä
2015-11-10 14:37       ` Jani Nikula
2015-11-10 14:16   ` [PATCH v2 " ville.syrjala
2015-11-10 14:43     ` Jani Nikula
2015-10-29 19:26 ` [PATCH 14/14] drm/i915: Configure eDP PLL freq from ironlake_edp_pll_on() ville.syrjala
2015-10-30 16:01   ` Daniel Vetter
2015-10-30 13:30 ` [PATCH 00/14] drm/i915: FIFO underrun elimination for PCH platforms Jani Nikula
2015-11-10 15:04 ` Ville Syrjälä

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