[PATCH 1/3] drm/radeon: Disable uncacheable CPU mappings of GTT with RV6xx

[PATCH 1/3] drm/radeon: Disable uncacheable CPU mappings of GTT with RV6xx

[Michel Dänzer]

From: Michel Dänzer <michel.daenzer@amd.com>

They reportedly cause random GPU hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91268

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/radeon_object.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index d302488..a35f5af 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -221,6 +221,12 @@ int radeon_bo_create(struct radeon_device *rdev,
 	if (!(rdev->flags & RADEON_IS_PCIE))
 		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
 
+	/* Write-combined CPU mappings of GTT cause GPU hangs with RV6xx
+	 * See https://bugs.freedesktop.org/show_bug.cgi?id=91268
+	 */
+	if (rdev->family >= CHIP_RV610 && rdev->family <= CHIP_RV635)
+		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
+
 #ifdef CONFIG_X86_32
 	/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
 	 * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
-- 
2.6.2

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[PATCH 2/3] drm/radeon: Always disable RADEON_GEM_GTT_UC along with RADEON_GEM_GTT_WC

[Michel Dänzer]

From: Michel Dänzer <michel.daenzer@amd.com>

Write-combining is a CPU feature. From the GPU POV, these both simply
mean no GPU<->CPU cache coherency.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/radeon_object.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index a35f5af..dda2ecf 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -231,7 +231,7 @@ int radeon_bo_create(struct radeon_device *rdev,
 	/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
 	 * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
 	 */
-	bo->flags &= ~RADEON_GEM_GTT_WC;
+	bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
 #elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
 	/* Don't try to enable write-combining when it can't work, or things
 	 * may be slow
@@ -243,7 +243,7 @@ int radeon_bo_create(struct radeon_device *rdev,
 
 	DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
 		      "better performance thanks to write-combining\n");
-	bo->flags &= ~RADEON_GEM_GTT_WC;
+	bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
 #endif
 
 	radeon_ttm_placement_from_domain(bo, domain);
-- 
2.6.2

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[PATCH 3/3] drm/radeon: Only prompt for enabling PAT when we'd allow write-combining

[Michel Dänzer]

From: Michel Dänzer <michel.daenzer@amd.com>

No use bothering users about this for whom we disable write-combining for
other reasons anyway.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
---
 drivers/gpu/drm/radeon/radeon_object.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index dda2ecf..84d4563 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -241,8 +241,9 @@ int radeon_bo_create(struct radeon_device *rdev,
 #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
 	 thanks to write-combining
 
-	DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
-		      "better performance thanks to write-combining\n");
+	if (bo->flags & RADEON_GEM_GTT_WC)
+		DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
+			      "better performance thanks to write-combining\n");
 	bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
 #endif
 
-- 
2.6.2

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Re: [PATCH 1/3] drm/radeon: Disable uncacheable CPU mappings of GTT with RV6xx

[Christian König]

On 05.11.2015 09:25, Michel Dänzer wrote:
> From: Michel Dänzer <michel.daenzer@amd.com>
>
> They reportedly cause random GPU hangs.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91268
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>

For this series Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/radeon/radeon_object.c | 6 ++++++
>   1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
> index d302488..a35f5af 100644
> --- a/drivers/gpu/drm/radeon/radeon_object.c
> +++ b/drivers/gpu/drm/radeon/radeon_object.c
> @@ -221,6 +221,12 @@ int radeon_bo_create(struct radeon_device *rdev,
>   	if (!(rdev->flags & RADEON_IS_PCIE))
>   		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
>   
> +	/* Write-combined CPU mappings of GTT cause GPU hangs with RV6xx
> +	 * See https://bugs.freedesktop.org/show_bug.cgi?id=91268
> +	 */
> +	if (rdev->family >= CHIP_RV610 && rdev->family <= CHIP_RV635)
> +		bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
> +
>   #ifdef CONFIG_X86_32
>   	/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
>   	 * See https://bugs.freedesktop.org/show_bug.cgi?id=84627

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Re: [PATCH 1/3] drm/radeon: Disable uncacheable CPU mappings of GTT with RV6xx

[Alex Deucher]

On Thu, Nov 5, 2015 at 5:41 AM, Christian König <deathsimple@vodafone.de> wrote:
> On 05.11.2015 09:25, Michel Dänzer wrote:
>>
>> From: Michel Dänzer <michel.daenzer@amd.com>
>>
>> They reportedly cause random GPU hangs.
>>
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91268
>>
>> Cc: stable@vger.kernel.org
>> Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
>
>
> For this series Reviewed-by: Christian König <christian.koenig@amd.com>

Applied.  thanks!

Alex

>
>> ---
>>   drivers/gpu/drm/radeon/radeon_object.c | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/radeon/radeon_object.c
>> b/drivers/gpu/drm/radeon/radeon_object.c
>> index d302488..a35f5af 100644
>> --- a/drivers/gpu/drm/radeon/radeon_object.c
>> +++ b/drivers/gpu/drm/radeon/radeon_object.c
>> @@ -221,6 +221,12 @@ int radeon_bo_create(struct radeon_device *rdev,
>>         if (!(rdev->flags & RADEON_IS_PCIE))
>>                 bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
>>   +     /* Write-combined CPU mappings of GTT cause GPU hangs with RV6xx
>> +        * See https://bugs.freedesktop.org/show_bug.cgi?id=91268
>> +        */
>> +       if (rdev->family >= CHIP_RV610 && rdev->family <= CHIP_RV635)
>> +               bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC);
>> +
>>   #ifdef CONFIG_X86_32
>>         /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
>>          * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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