From: yang.shi@linaro.org (Shi, Yang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V3 2/2] arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS
Date: Mon, 16 Nov 2015 11:48:57 -0800 [thread overview]
Message-ID: <564A3329.1070504@linaro.org> (raw)
In-Reply-To: <CABg9mcvomep=M1As_Vj=XuTNk=jiGwXQqQWbjotMXP2csKX=Bg@mail.gmail.com>
On 11/13/2015 6:39 PM, Z Lim wrote:
> Yang, I noticed another thing...
>
> On Fri, Nov 13, 2015 at 10:09 AM, Yang Shi <yang.shi@linaro.org> wrote:
>> Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP
>> in prologue in order to get the correct stack backtrace.
>>
>> However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to
>> change during function call so it may cause the BPF prog stack base address
>> change too.
>>
>> Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee
>> saved register, so it will keep intact during function call.
>
> Can you please add save/restore for x25 also? :)
Sure. BTW, since PUSH invokes stp instruction and SP need 16-bytes
alignment, so we have to save x26 with x25 together. Anyway, it won't
introduce any harm overhead since one instruction saves two registers.
Yang
>
>> It is initialized in BPF prog prologue when BPF prog is started to run
>> everytime. When BPF prog exits, it could be just tossed.
>>
WARNING: multiple messages have this Message-ID (diff)
From: "Shi, Yang" <yang.shi@linaro.org>
To: Z Lim <zlim.lnx@gmail.com>
Cc: Alexei Starovoitov <ast@kernel.org>,
Daniel Borkmann <daniel@iogearbox.net>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>, Xi Wang <xi.wang@gmail.com>,
LKML <linux-kernel@vger.kernel.org>,
Network Development <netdev@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
linaro-kernel@lists.linaro.org
Subject: Re: [PATCH V3 2/2] arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS
Date: Mon, 16 Nov 2015 11:48:57 -0800 [thread overview]
Message-ID: <564A3329.1070504@linaro.org> (raw)
In-Reply-To: <CABg9mcvomep=M1As_Vj=XuTNk=jiGwXQqQWbjotMXP2csKX=Bg@mail.gmail.com>
On 11/13/2015 6:39 PM, Z Lim wrote:
> Yang, I noticed another thing...
>
> On Fri, Nov 13, 2015 at 10:09 AM, Yang Shi <yang.shi@linaro.org> wrote:
>> Save and restore FP/LR in BPF prog prologue and epilogue, save SP to FP
>> in prologue in order to get the correct stack backtrace.
>>
>> However, ARM64 JIT used FP (x29) as eBPF fp register, FP is subjected to
>> change during function call so it may cause the BPF prog stack base address
>> change too.
>>
>> Use x25 to replace FP as BPF stack base register (fp). Since x25 is callee
>> saved register, so it will keep intact during function call.
>
> Can you please add save/restore for x25 also? :)
Sure. BTW, since PUSH invokes stp instruction and SP need 16-bytes
alignment, so we have to save x26 with x25 together. Anyway, it won't
introduce any harm overhead since one instruction saves two registers.
Yang
>
>> It is initialized in BPF prog prologue when BPF prog is started to run
>> everytime. When BPF prog exits, it could be just tossed.
>>
next prev parent reply other threads:[~2015-11-16 19:48 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CABg9mct-hnEhvT6y9ZgCC8nMan5YbmByQa_ViUWzeea6ToqG4A@mail.gmail.com>
2015-11-13 18:09 ` [PATCH V3 2/2] arm64: bpf: make BPF prologue and epilogue align with ARM64 AAPCS Yang Shi
2015-11-13 18:09 ` Yang Shi
2015-11-14 2:39 ` Z Lim
2015-11-14 2:39 ` Z Lim
2015-11-14 2:39 ` Z Lim
2015-11-16 19:48 ` Shi, Yang [this message]
2015-11-16 19:48 ` Shi, Yang
2015-11-16 22:35 ` [PATCH V4 " Yang Shi
2015-11-16 22:35 ` Yang Shi
2015-11-17 4:37 ` Z Lim
2015-11-17 4:37 ` Z Lim
2015-11-17 4:41 ` Alexei Starovoitov
2015-11-17 4:41 ` Alexei Starovoitov
2015-11-17 4:43 ` Shi, Yang
2015-11-17 4:43 ` Shi, Yang
2015-11-17 16:51 ` David Miller
2015-11-17 16:51 ` David Miller
2015-11-17 19:44 ` David Miller
2015-11-17 19:44 ` David Miller
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