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* [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit
@ 2015-11-25  8:54 ` Sjoerd Simons
  0 siblings, 0 replies; 5+ messages in thread
From: Sjoerd Simons @ 2015-11-25  8:54 UTC (permalink / raw)
  To: Mark Brown
  Cc: Jaroslav Kysela, alsa-devel, Heiko Stuebner, linux-rockchip,
	linux-kernel, Takashi Iwai, Liam Girdwood, linux-arm-kernel

Correct valid data word register value for 24 bit data width. The
bit value should be 10 (aka 0x2), not 0x10.

This fixes playback of 24 bit audio.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>

---

 sound/soc/rockchip/rockchip_spdif.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h
index 07f86a2..921b409 100644
--- a/sound/soc/rockchip/rockchip_spdif.h
+++ b/sound/soc/rockchip/rockchip_spdif.h
@@ -28,9 +28,9 @@
 #define SPDIF_CFGR_VDW(x)	(x << SPDIF_CFGR_VDW_SHIFT)
 #define SDPIF_CFGR_VDW_MASK	(0xf << SPDIF_CFGR_VDW_SHIFT)
 
-#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x00)
-#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x01)
-#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x10)
+#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x0)
+#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x1)
+#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x2)
 
 /*
  * DMACR
-- 
2.6.2

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit
@ 2015-11-25  8:54 ` Sjoerd Simons
  0 siblings, 0 replies; 5+ messages in thread
From: Sjoerd Simons @ 2015-11-25  8:54 UTC (permalink / raw)
  To: linux-arm-kernel

Correct valid data word register value for 24 bit data width. The
bit value should be 10 (aka 0x2), not 0x10.

This fixes playback of 24 bit audio.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>

---

 sound/soc/rockchip/rockchip_spdif.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h
index 07f86a2..921b409 100644
--- a/sound/soc/rockchip/rockchip_spdif.h
+++ b/sound/soc/rockchip/rockchip_spdif.h
@@ -28,9 +28,9 @@
 #define SPDIF_CFGR_VDW(x)	(x << SPDIF_CFGR_VDW_SHIFT)
 #define SDPIF_CFGR_VDW_MASK	(0xf << SPDIF_CFGR_VDW_SHIFT)
 
-#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x00)
-#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x01)
-#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x10)
+#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x0)
+#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x1)
+#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x2)
 
 /*
  * DMACR
-- 
2.6.2

^ permalink raw reply related	[flat|nested] 5+ messages in thread
* Re: [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit
  2015-11-25  8:54 ` Sjoerd Simons
@ 2015-11-25  9:03   ` Caesar Wang
  -1 siblings, 0 replies; 5+ messages in thread
From: Caesar Wang @ 2015-11-25  9:03 UTC (permalink / raw)
  To: Sjoerd Simons, Mark Brown
  Cc: alsa-devel, Heiko Stuebner, Liam Girdwood, Takashi Iwai,
	linux-kernel, linux-rockchip, Jaroslav Kysela, linux-arm-kernel

Hi,

在 2015年11月25日 16:54, Sjoerd Simons 写道:
> Correct valid data word register value for 24 bit data width. The
> bit value should be 10 (aka 0x2), not 0x10.
>
> This fixes playback of 24 bit audio.
>
> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
>
> ---
>
>   sound/soc/rockchip/rockchip_spdif.h | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h
> index 07f86a2..921b409 100644
> --- a/sound/soc/rockchip/rockchip_spdif.h
> +++ b/sound/soc/rockchip/rockchip_spdif.h
> @@ -28,9 +28,9 @@
>   #define SPDIF_CFGR_VDW(x)	(x << SPDIF_CFGR_VDW_SHIFT)
>   #define SDPIF_CFGR_VDW_MASK	(0xf << SPDIF_CFGR_VDW_SHIFT)
>   
> -#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x00)
> -#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x01)
> -#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x10)
> +#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x0)
> +#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x1)
> +#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x2)

Yep,
 From the TRM says: (RK3288/RK3368...)

VDW
Valid data width
00: 16bit
01: 20bit
10: 24bit
11: reserved
....

So feel free add my tag:

Reviewed-by: Caesar Wang <wxt@rock-chips.com>


>   
>   /*
>    * DMACR


-- 
caesar wang | software engineer | wxt@rock-chip.com

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit
@ 2015-11-25  9:03   ` Caesar Wang
  0 siblings, 0 replies; 5+ messages in thread
From: Caesar Wang @ 2015-11-25  9:03 UTC (permalink / raw)
  To: linux-arm-kernel

Hi,

? 2015?11?25? 16:54, Sjoerd Simons ??:
> Correct valid data word register value for 24 bit data width. The
> bit value should be 10 (aka 0x2), not 0x10.
>
> This fixes playback of 24 bit audio.
>
> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
>
> ---
>
>   sound/soc/rockchip/rockchip_spdif.h | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h
> index 07f86a2..921b409 100644
> --- a/sound/soc/rockchip/rockchip_spdif.h
> +++ b/sound/soc/rockchip/rockchip_spdif.h
> @@ -28,9 +28,9 @@
>   #define SPDIF_CFGR_VDW(x)	(x << SPDIF_CFGR_VDW_SHIFT)
>   #define SDPIF_CFGR_VDW_MASK	(0xf << SPDIF_CFGR_VDW_SHIFT)
>   
> -#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x00)
> -#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x01)
> -#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x10)
> +#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x0)
> +#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x1)
> +#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x2)

Yep,
 From the TRM says: (RK3288/RK3368...)

VDW
Valid data width
00: 16bit
01: 20bit
10: 24bit
11: reserved
....

So feel free add my tag:

Reviewed-by: Caesar Wang <wxt@rock-chips.com>


>   
>   /*
>    * DMACR


-- 
caesar wang | software engineer | wxt at rock-chip.com

^ permalink raw reply	[flat|nested] 5+ messages in thread
* Applied "ASoC: rockchip: Fix incorrect VDW value for 24 bit" to the asoc tree
  2015-11-25  8:54 ` Sjoerd Simons
  (?)
  (?)
@ 2015-11-25 12:11 ` Mark Brown
  -1 siblings, 0 replies; 5+ messages in thread
From: Mark Brown @ 2015-11-25 12:11 UTC (permalink / raw)
  To: Sjoerd Simons, Mark Brown; +Cc: alsa-devel

The patch

   ASoC: rockchip: Fix incorrect VDW value for 24 bit

has been applied to the asoc tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 18a9d7486ad28d68920128720514f9555a4c1869 Mon Sep 17 00:00:00 2001
From: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Date: Wed, 25 Nov 2015 09:54:11 +0100
Subject: [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit

Correct valid data word register value for 24 bit data width. The
bit value should be 10 (aka 0x2), not 0x10.

This fixes playback of 24 bit audio.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 sound/soc/rockchip/rockchip_spdif.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/sound/soc/rockchip/rockchip_spdif.h b/sound/soc/rockchip/rockchip_spdif.h
index 07f86a21046a..921b4095fb92 100644
--- a/sound/soc/rockchip/rockchip_spdif.h
+++ b/sound/soc/rockchip/rockchip_spdif.h
@@ -28,9 +28,9 @@
 #define SPDIF_CFGR_VDW(x)	(x << SPDIF_CFGR_VDW_SHIFT)
 #define SDPIF_CFGR_VDW_MASK	(0xf << SPDIF_CFGR_VDW_SHIFT)
 
-#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x00)
-#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x01)
-#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x10)
+#define SPDIF_CFGR_VDW_16	SPDIF_CFGR_VDW(0x0)
+#define SPDIF_CFGR_VDW_20	SPDIF_CFGR_VDW(0x1)
+#define SPDIF_CFGR_VDW_24	SPDIF_CFGR_VDW(0x2)
 
 /*
  * DMACR
-- 
2.6.2

^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-11-25 12:11 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-11-25  8:54 [PATCH] ASoC: rockchip: Fix incorrect VDW value for 24 bit Sjoerd Simons
2015-11-25  8:54 ` Sjoerd Simons
2015-11-25  9:03 ` Caesar Wang
2015-11-25  9:03   ` Caesar Wang
2015-11-25 12:11 ` Applied "ASoC: rockchip: Fix incorrect VDW value for 24 bit" to the asoc tree Mark Brown

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