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From: Shannon Zhao <shannon.zhao@linaro.org>
To: Marc Zyngier <marc.zyngier@arm.com>,
	Shannon Zhao <zhaoshenglong@huawei.com>,
	kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org
Cc: kvm@vger.kernel.org, will.deacon@arm.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 21/21] KVM: ARM64: Add a new kvm ARM PMU device
Date: Mon, 07 Dec 2015 22:37:57 +0800	[thread overview]
Message-ID: <566599C5.4030400@linaro.org> (raw)
In-Reply-To: <56659029.7040102@arm.com>



On 2015/12/7 21:56, Marc Zyngier wrote:
>> +static int kvm_arm_pmu_set_attr(struct kvm_device *dev,
>> >+				struct kvm_device_attr *attr)
>> >+{
>> >+	switch (attr->group) {
>> >+	case KVM_DEV_ARM_PMU_GRP_IRQ: {
>> >+		int __user *uaddr = (int __user *)(long)attr->addr;
>> >+		int reg;
>> >+
>> >+		if (get_user(reg, uaddr))
>> >+			return -EFAULT;
>> >+
>> >+		if (reg < VGIC_NR_SGIS || reg >= VGIC_NR_PRIVATE_IRQS)
>> >+			return -EINVAL;
>> >+
>> >+		return kvm_arm_pmu_set_irq(dev->kvm, reg);
> What prevents the IRQ to be changed while the VM is already running?
> This should probably be a one-shot thing (change it once, be denied
> other changes).

So add a helper like vgic_initialized to check whether vPMU is initialized?

Thanks,
-- 
Shannon

WARNING: multiple messages have this Message-ID (diff)
From: shannon.zhao@linaro.org (Shannon Zhao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 21/21] KVM: ARM64: Add a new kvm ARM PMU device
Date: Mon, 07 Dec 2015 22:37:57 +0800	[thread overview]
Message-ID: <566599C5.4030400@linaro.org> (raw)
In-Reply-To: <56659029.7040102@arm.com>



On 2015/12/7 21:56, Marc Zyngier wrote:
>> +static int kvm_arm_pmu_set_attr(struct kvm_device *dev,
>> >+				struct kvm_device_attr *attr)
>> >+{
>> >+	switch (attr->group) {
>> >+	case KVM_DEV_ARM_PMU_GRP_IRQ: {
>> >+		int __user *uaddr = (int __user *)(long)attr->addr;
>> >+		int reg;
>> >+
>> >+		if (get_user(reg, uaddr))
>> >+			return -EFAULT;
>> >+
>> >+		if (reg < VGIC_NR_SGIS || reg >= VGIC_NR_PRIVATE_IRQS)
>> >+			return -EINVAL;
>> >+
>> >+		return kvm_arm_pmu_set_irq(dev->kvm, reg);
> What prevents the IRQ to be changed while the VM is already running?
> This should probably be a one-shot thing (change it once, be denied
> other changes).

So add a helper like vgic_initialized to check whether vPMU is initialized?

Thanks,
-- 
Shannon

  reply	other threads:[~2015-12-07 14:36 UTC|newest]

Thread overview: 99+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-03  6:11 [PATCH v5 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2015-12-03  6:11 ` Shannon Zhao
2015-12-03  6:11 ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-07 15:05   ` Marc Zyngier
2015-12-07 15:05     ` Marc Zyngier
2015-12-07 16:42     ` Marc Zyngier
2015-12-07 16:42       ` Marc Zyngier
2015-12-03  6:11 ` [PATCH v5 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-07 14:06   ` Marc Zyngier
2015-12-07 14:06     ` Marc Zyngier
2015-12-07 14:31     ` Shannon Zhao
2015-12-07 14:31       ` Shannon Zhao
2015-12-07 14:55       ` Marc Zyngier
2015-12-07 14:55         ` Marc Zyngier
2015-12-08  8:09         ` Shannon Zhao
2015-12-08  8:09           ` Shannon Zhao
2015-12-08  8:09           ` Shannon Zhao
2015-12-08  9:02           ` Marc Zyngier
2015-12-08  9:02             ` Marc Zyngier
2015-12-03  6:11 ` [PATCH v5 04/21] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-07 13:28   ` Marc Zyngier
2015-12-07 13:28     ` Marc Zyngier
2015-12-03  6:11 ` [PATCH v5 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 06/21] KVM: ARM64: Add reset and access handlers for PMCEID0 and PMCEID1 register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 08/21] KVM: ARM64: Add reset and access handlers for PMXEVTYPER register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-07 13:38   ` Marc Zyngier
2015-12-07 13:38     ` Marc Zyngier
2015-12-03  6:11 ` [PATCH v5 09/21] KVM: ARM64: Add reset and access handlers for PMXEVCNTR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 10/21] KVM: ARM64: Add reset and access handlers for PMCCNTR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 11/21] KVM: ARM64: Add reset and access handlers for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-07 13:42   ` Marc Zyngier
2015-12-07 13:42     ` Marc Zyngier
2015-12-03  6:11 ` [PATCH v5 12/21] KVM: ARM64: Add reset and access handlers for PMINTENSET and PMINTENCLR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 13/21] KVM: ARM64: Add reset and access handlers for PMOVSSET and PMOVSCLR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 14/21] KVM: ARM64: Add reset and access handlers for PMUSERENR register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 15/21] KVM: ARM64: Add reset and access handlers for PMSWINC register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 16/21] KVM: ARM64: Add access handlers for PMEVCNTRn and PMEVTYPERn register Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 17/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 18/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 19/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 20/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11 ` [PATCH v5 21/21] KVM: ARM64: Add a new kvm ARM PMU device Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-03  6:11   ` Shannon Zhao
2015-12-07 13:56   ` Marc Zyngier
2015-12-07 13:56     ` Marc Zyngier
2015-12-07 14:37     ` Shannon Zhao [this message]
2015-12-07 14:37       ` Shannon Zhao
2015-12-07 15:06       ` Marc Zyngier
2015-12-07 15:06         ` Marc Zyngier
2015-12-07 14:11 ` [PATCH v5 00/21] KVM: ARM64: Add guest PMU support Marc Zyngier
2015-12-07 14:11   ` Marc Zyngier
2015-12-07 14:47   ` Shannon Zhao
2015-12-07 14:47     ` Shannon Zhao
2015-12-07 15:09     ` Marc Zyngier
2015-12-07 15:09       ` Marc Zyngier

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