From: Michael Davidsaver <mdavidsaver@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com>,
qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-arm] [PATCH v2 02/26] armv7m: Undo armv7m.hack
Date: Sun, 27 Dec 2015 20:55:03 -0500 [thread overview]
Message-ID: <56809677.5080003@gmail.com> (raw)
In-Reply-To: <CAFEAcA90sBFurRv6rbDEP7Q-qEy2PrpH7BgHVFOt15ZDfk68NQ@mail.gmail.com>
On 12/17/2015 10:38 AM, Peter Maydell wrote:
> We could use a comment here (a) explaining what we're doing and (b)
> mentioning that this isn't architecturally correct -- ideally we should
> catch these exception exits on execution of the jump insn, not by
> letting the jump execute and then trapping when we actually try to
> execute at the magic addresses.
I had an instructive little digression to investigate doing things the
"right way" (in tcg). I can see how it would be done by adding a
conditional every time the PC could be updated. To me the unassigned
handler trick/hack seems simpler (less likely to add a bug) and avoids
emitting more code for every ldm/pop instruction.
WARNING: multiple messages have this Message-ID (diff)
From: Michael Davidsaver <mdavidsaver@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <crosthwaitepeter@gmail.com>,
qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v2 02/26] armv7m: Undo armv7m.hack
Date: Sun, 27 Dec 2015 20:55:03 -0500 [thread overview]
Message-ID: <56809677.5080003@gmail.com> (raw)
In-Reply-To: <CAFEAcA90sBFurRv6rbDEP7Q-qEy2PrpH7BgHVFOt15ZDfk68NQ@mail.gmail.com>
On 12/17/2015 10:38 AM, Peter Maydell wrote:
> We could use a comment here (a) explaining what we're doing and (b)
> mentioning that this isn't architecturally correct -- ideally we should
> catch these exception exits on execution of the jump insn, not by
> letting the jump execute and then trapping when we actually try to
> execute at the magic addresses.
I had an instructive little digression to investigate doing things the
"right way" (in tcg). I can see how it would be done by adding a
conditional every time the PC could be updated. To me the unassigned
handler trick/hack seems simpler (less likely to add a bug) and avoids
emitting more code for every ldm/pop instruction.
next prev parent reply other threads:[~2015-12-28 1:55 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-03 0:18 [Qemu-devel] [PATCH v2 00/26] armv7m: exception handling, MPU, and more Michael Davidsaver
2015-12-03 0:18 ` [Qemu-arm] [PATCH v2 01/26] armv7m: MRS/MSR handle unprivileged access Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] " Michael Davidsaver
2015-12-17 13:10 ` [Qemu-arm] " Peter Maydell
2015-12-17 13:10 ` [Qemu-devel] " Peter Maydell
2017-01-12 14:14 ` [Qemu-arm] " Peter Maydell
2017-01-12 14:14 ` [Qemu-devel] " Peter Maydell
2017-01-12 16:33 ` [Qemu-arm] " Michael Davidsaver
2017-01-12 16:33 ` [Qemu-devel] " Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 02/26] armv7m: Undo armv7m.hack Michael Davidsaver
2015-12-17 15:38 ` [Qemu-arm] " Peter Maydell
2015-12-17 15:38 ` [Qemu-devel] " Peter Maydell
2015-12-27 20:22 ` [Qemu-arm] " Michael Davidsaver
2015-12-27 20:22 ` [Qemu-devel] " Michael Davidsaver
2015-12-28 18:36 ` [Qemu-arm] " Peter Maydell
2015-12-28 18:36 ` [Qemu-devel] " Peter Maydell
2015-12-28 1:55 ` Michael Davidsaver [this message]
2015-12-28 1:55 ` Michael Davidsaver
2015-12-28 18:27 ` [Qemu-arm] " Peter Maydell
2015-12-28 18:27 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 03/26] armv7m: Explicit error for bad vector table Michael Davidsaver
2015-12-17 13:25 ` [Qemu-arm] " Peter Maydell
2015-12-17 13:25 ` [Qemu-devel] " Peter Maydell
2015-12-27 20:43 ` [Qemu-arm] " Michael Davidsaver
2015-12-27 20:43 ` [Qemu-devel] " Michael Davidsaver
2015-12-28 18:38 ` [Qemu-arm] " Peter Maydell
2015-12-28 18:38 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 04/26] armv7m: additional cpu state for exception handling Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 05/26] armv7m: add armv7m_excp_running_prio() Michael Davidsaver
2015-12-17 14:36 ` [Qemu-arm] " Peter Maydell
2015-12-17 14:36 ` [Qemu-devel] " Peter Maydell
2015-12-27 20:56 ` [Qemu-arm] " Michael Davidsaver
2015-12-27 20:56 ` [Qemu-devel] " Michael Davidsaver
2015-12-28 18:41 ` Peter Maydell
2015-12-03 0:18 ` [Qemu-arm] [PATCH v2 06/26] armv7m: fix I and F flag handling Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] " Michael Davidsaver
2015-12-17 14:39 ` [Qemu-arm] " Peter Maydell
2015-12-17 14:39 ` [Qemu-devel] " Peter Maydell
2015-12-17 15:18 ` [Qemu-arm] " Peter Maydell
2015-12-17 15:18 ` [Qemu-devel] " Peter Maydell
2015-12-28 1:59 ` [Qemu-arm] " Michael Davidsaver
2015-12-28 1:59 ` [Qemu-devel] " Michael Davidsaver
2015-12-28 18:43 ` [Qemu-arm] " Peter Maydell
2015-12-28 18:43 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 07/26] armv7m: simpler/faster exception start Michael Davidsaver
2015-12-17 15:39 ` [Qemu-arm] " Peter Maydell
2015-12-17 15:39 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 08/26] armv7m: rewrite NVIC Michael Davidsaver
2015-12-17 18:49 ` [Qemu-arm] " Peter Maydell
2015-12-17 18:49 ` [Qemu-devel] " Peter Maydell
2015-12-19 19:08 ` Christopher Friedt
2015-12-19 19:45 ` Christopher Friedt
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 09/26] armv7m: implement CFSR, HFSR, BFAR, and MMFAR Michael Davidsaver
2015-12-17 19:04 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:04 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 10/26] armv7m: auto-clear FAULTMASK Michael Davidsaver
2015-12-17 19:07 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:07 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 11/26] arm: gic: Remove references to NVIC Michael Davidsaver
2015-12-17 19:08 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:08 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 12/26] armv7m: check exception return consistency Michael Davidsaver
2015-12-17 19:26 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:26 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 13/26] armv7m: implement CCR Michael Davidsaver
2015-12-17 19:31 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:31 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 14/26] armv7m: prevent unprivileged write to STIR Michael Davidsaver
2015-12-17 19:33 ` [Qemu-arm] " Peter Maydell
2015-12-17 19:33 ` [Qemu-devel] " Peter Maydell
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 15/26] armv7m: add MPU to cortex-m3 and cortex-m4 Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 16/26] armv7m: add some mpu debugging prints Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 17/26] armv7m: mpu background miss is perm fault Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 18/26] armv7m: update base region policy Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 19/26] armv7m: mpu not allowed to map exception return codes Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 20/26] armv7m: observable initial register state Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 21/26] armv7m: CONTROL<1> handling Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 22/26] armv7m: priority field mask Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 23/26] qom: add cpu_generic_init_unrealized() Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 24/26] armv7m: split armv7m_init in two parts Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] [PATCH v2 25/26] armv7m: remove extra cpu_reset() Michael Davidsaver
2015-12-03 0:18 ` [Qemu-arm] [PATCH v2 26/26] armv7m: decide whether faults are MemManage or BusFault Michael Davidsaver
2015-12-03 0:18 ` [Qemu-devel] " Michael Davidsaver
2015-12-17 19:38 ` [Qemu-devel] [PATCH v2 00/26] armv7m: exception handling, MPU, and more Peter Maydell
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