From: daniel.lezcano@linaro.org (Daniel Lezcano)
To: linux-snps-arc@lists.infradead.org
Subject: [PATCH v3 2/3] clocksource: Add NPS400 timers driver
Date: Tue, 9 Feb 2016 23:55:13 +0100 [thread overview]
Message-ID: <56BA6E51.9040507@linaro.org> (raw)
In-Reply-To: <HE1PR02MB1387E31FF8EB39D42CCB2C3BD6D60@HE1PR02MB1387.eurprd02.prod.outlook.com>
On 02/09/2016 10:47 PM, Noam Camus wrote:
>> From: Daniel Lezcano <daniel.lezcano at linaro.org> Sent: Tuesday,
>> February 9, 2016 3:38 PM
>
>> Actually I was referring to clk_prepare_enable,
>> clocksource_register_hz. Agree clk_get_rate is always valid.
> Thanks for making this clear. Any way as you can see I do call
> pr_err() in case of error just like most drivers around. By "hang" do
> you mean calling panic()?
No. I meant the errors are caught but no action is taken, the execution
continues normally as nothing wrong happened. This is why I asked if you
expect the host to hang at boot time with the last error as a hint.
I was expecting to see a call to clk_disable_unprepare if
clocksource_register_hz fails, and returning 'ret' if clk_prepare_enable
fails.
> What if there is another clocksource in DT (even with worse rating)?
> I still prefer using it then having non workable machine.
You are right. This is why failing gracefully in the init function is
important.
>>>> You can simplify the driver even more by using
>>>> clocksource_mmio_init.
>>> Since my base address depends on cluster number, which CPU is
>>> part of, this interface is not much of a use. On top of that it
>>> assumes that I am little endian by using readl family
>>> accessories.
>
>> Why can't you use ?
>
>> clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick",
>> nps_timer_rate, 32, nps_clksrc_read);
>
> I believe that the simplification is meant for drivers that can
> actually use the clocksource_mmio..() accessories. Could you explain
> what is the advantage here, for my case, to use clocksource_mmio
> driver?
Using the mmio generic code will save:
+static struct clocksource nps_counter = {
+ .name = "EZnps-tick",
+ .rating = 301,
+ .read = nps_clksrc_read,
+ .mask = CLOCKSOURCE_MASK(32),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
Up to you.
-- Daniel
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: Noam Camus <noamc@ezchip.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Cc: "linux-snps-arc@lists.infradead.org"
<linux-snps-arc@lists.infradead.org>,
"marc.zyngier@arm.com" <marc.zyngier@arm.com>,
Chris Metcalf <cmetcalf@ezchip.com>, Tal Zilcer <talz@ezchip.com>,
Gilad Ben Yossef <giladb@ezchip.com>,
Rob Herring <robh+dt@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
John Stultz <john.stultz@linaro.org>
Subject: Re: [PATCH v3 2/3] clocksource: Add NPS400 timers driver
Date: Tue, 9 Feb 2016 23:55:13 +0100 [thread overview]
Message-ID: <56BA6E51.9040507@linaro.org> (raw)
In-Reply-To: <HE1PR02MB1387E31FF8EB39D42CCB2C3BD6D60@HE1PR02MB1387.eurprd02.prod.outlook.com>
On 02/09/2016 10:47 PM, Noam Camus wrote:
>> From: Daniel Lezcano <daniel.lezcano@linaro.org> Sent: Tuesday,
>> February 9, 2016 3:38 PM
>
>> Actually I was referring to clk_prepare_enable,
>> clocksource_register_hz. Agree clk_get_rate is always valid.
> Thanks for making this clear. Any way as you can see I do call
> pr_err() in case of error just like most drivers around. By "hang" do
> you mean calling panic()?
No. I meant the errors are caught but no action is taken, the execution
continues normally as nothing wrong happened. This is why I asked if you
expect the host to hang at boot time with the last error as a hint.
I was expecting to see a call to clk_disable_unprepare if
clocksource_register_hz fails, and returning 'ret' if clk_prepare_enable
fails.
> What if there is another clocksource in DT (even with worse rating)?
> I still prefer using it then having non workable machine.
You are right. This is why failing gracefully in the init function is
important.
>>>> You can simplify the driver even more by using
>>>> clocksource_mmio_init.
>>> Since my base address depends on cluster number, which CPU is
>>> part of, this interface is not much of a use. On top of that it
>>> assumes that I am little endian by using readl family
>>> accessories.
>
>> Why can't you use ?
>
>> clocksource_mmio_init(nps_msu_reg_low_addr, "EZnps-tick",
>> nps_timer_rate, 32, nps_clksrc_read);
>
> I believe that the simplification is meant for drivers that can
> actually use the clocksource_mmio..() accessories. Could you explain
> what is the advantage here, for my case, to use clocksource_mmio
> driver?
Using the mmio generic code will save:
+static struct clocksource nps_counter = {
+ .name = "EZnps-tick",
+ .rating = 301,
+ .read = nps_clksrc_read,
+ .mask = CLOCKSOURCE_MASK(32),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
Up to you.
-- Daniel
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
next prev parent reply other threads:[~2016-02-09 22:55 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-02 13:14 [PATCH v2 0/3] Adding NPS400 drivers Noam Camus
2016-02-02 13:14 ` Noam Camus
2016-02-02 13:14 ` [PATCH v2 1/3] soc: Support for EZchip SoC Noam Camus
2016-02-02 13:14 ` Noam Camus
2016-02-02 13:14 ` [PATCH v2 2/3] clocksource: Add NPS400 timers driver Noam Camus
2016-02-02 13:14 ` Noam Camus
2016-02-02 14:36 ` kbuild test robot
2016-02-02 14:36 ` kbuild test robot
2016-02-02 13:14 ` [PATCH v2 3/3] irqchip: add nps Internal and external irqchips Noam Camus
2016-02-02 13:14 ` Noam Camus
2016-02-02 13:35 ` Thomas Gleixner
2016-02-02 13:35 ` Thomas Gleixner
2016-02-02 20:40 ` kbuild test robot
2016-02-02 20:40 ` kbuild test robot
2016-02-06 16:16 ` [PATCH v3 0/3] Adding NPS400 drivers Noam Camus
2016-02-06 16:16 ` Noam Camus
2016-02-11 3:02 ` [PATCH v4 " Noam Camus
2016-02-11 3:02 ` Noam Camus
2016-02-11 18:40 ` [PATCH v5 " Noam Camus
2016-02-11 18:40 ` Noam Camus
2016-02-17 7:05 ` Noam Camus
2016-02-17 7:05 ` Noam Camus
2016-02-11 18:40 ` [PATCH v5 1/3] soc: Support for EZchip SoC Noam Camus
2016-02-11 18:40 ` Noam Camus
2016-02-11 18:40 ` [PATCH v5 2/3] clocksource: Add NPS400 timers driver Noam Camus
2016-02-11 18:40 ` Noam Camus
2016-02-11 20:29 ` Daniel Lezcano
2016-02-11 20:29 ` Daniel Lezcano
2016-02-11 18:40 ` [PATCH v5 3/3] irqchip: add nps Internal and external irqchips Noam Camus
2016-02-11 18:40 ` Noam Camus
2016-02-19 14:03 ` Jason Cooper
2016-02-19 14:03 ` Jason Cooper
2016-02-19 14:42 ` Noam Camus
2016-02-19 14:42 ` Noam Camus
2016-02-11 3:02 ` [PATCH v4 1/3] soc: Support for EZchip SoC Noam Camus
2016-02-11 3:02 ` Noam Camus
2016-02-11 3:02 ` [PATCH v4 2/3] clocksource: Add NPS400 timers driver Noam Camus
2016-02-11 3:02 ` Noam Camus
2016-02-11 8:18 ` Daniel Lezcano
2016-02-11 8:18 ` Daniel Lezcano
2016-02-11 3:02 ` [PATCH v4 3/3] irqchip: add nps Internal and external irqchips Noam Camus
2016-02-11 3:02 ` Noam Camus
2016-02-06 16:16 ` [PATCH v3 1/3] soc: Support for EZchip SoC Noam Camus
2016-02-06 16:16 ` Noam Camus
2016-02-06 16:16 ` [PATCH v3 2/3] clocksource: Add NPS400 timers driver Noam Camus
2016-02-06 16:16 ` Noam Camus
2016-02-08 14:21 ` Daniel Lezcano
2016-02-08 14:21 ` Daniel Lezcano
2016-02-09 12:36 ` Noam Camus
2016-02-09 12:36 ` Noam Camus
2016-02-09 13:38 ` Daniel Lezcano
2016-02-09 13:38 ` Daniel Lezcano
2016-02-09 21:47 ` Noam Camus
2016-02-09 21:47 ` Noam Camus
2016-02-09 22:55 ` Daniel Lezcano [this message]
2016-02-09 22:55 ` Daniel Lezcano
2016-02-10 8:01 ` Noam Camus
2016-02-10 8:01 ` Noam Camus
2016-02-06 16:16 ` [PATCH v3 3/3] irqchip: add nps Internal and external irqchips Noam Camus
2016-02-06 16:16 ` Noam Camus
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