Re: [PATCH] clk: qcom: Fix pre-divider usage for pixel RCG

[Archit Taneja <architt@codeaurora.org>]

On 2/27/2016 2:10 AM, John Stultz wrote:
> On Thu, Feb 25, 2016 at 9:30 PM, Archit Taneja <architt@codeaurora.org> wrote:
>> The clk_rcg_pixel_set_rate clk_op sets up the pre-divider by reading
>> its current value from the NS register.
>>
>> Using the pre-divider wasn't really intended when creating these ops.
>> The pixel RCG was only intended to achieve fractional multiplication
>> provided in the pixel_table array. Leaving the pre-divider to the
>> existing register value results in a wrong pixel clock when the
>> bootloader sets up the display. This was left unidentified because
>> the IFC6410 Plus board on which this was verified didn't have a
>> bootloader that configured the display.
>>
>> Don't set the RCG pre-divider in freq_tbl to the existing NS register
>> value. Instead, set it based on the fractional multiplication we want.
>> Prevent using M/N counter when we can just manage with using the
>> pre-divider.
>>
>> Cc: John Stultz <john.stultz@linaro.org>
>> Cc: Vinay Simha <vinaysimha@inforcecomputing.com>
>> Signed-off-by: Archit Taneja <architt@codeaurora.org>
>> ---
>> John, Vinay, could you please test this on N7 and confirm if it works?
>
> Hey Archit,
>
> So this did not work for me. I removed the earlier patch forcing
> pre_div to 1, and added this, but that ended up with a mostly black
> screen with a bit of blue slowly scrolling down the side.
>
> With the f.pre_div=1 line re-added, I don't see anything. The screen
> just goes black and doesn't come back.
>
> Let me know if I can test anything else for you, or add any debug messages.

Thanks for trying the patch. There was a small optimization which seems
to make things worse for us. I'm going to post out a v2 which does the
same thing as the earlier patch.

Archit

>
> thanks
> -john
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