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From: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
	MLongnecker-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org,
	mikko.perttunen-/1wQRMveznE@public.gmane.org,
	swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature
Date: Mon, 7 Mar 2016 16:45:16 +0800	[thread overview]
Message-ID: <56DD3F9C.3000700@nvidia.com> (raw)
In-Reply-To: <20160307083842.GC31189-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org>



On 2016年03月07日 16:38, Thierry Reding wrote:
> * PGP Signed by an unknown key
> 
> On Mon, Feb 29, 2016 at 05:51:20PM +0800, Wei Ni wrote:
>> The sign bit of temperature readback is bit 0, not bit 1.
>> Change to BIT(0) to fix it.
>>
>> Signed-off-by: Wei Ni <wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>>  drivers/thermal/tegra_soctherm.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
>> index 74ea5765938b..136975220c92 100644
>> --- a/drivers/thermal/tegra_soctherm.c
>> +++ b/drivers/thermal/tegra_soctherm.c
>> @@ -57,7 +57,7 @@
>>  #define READBACK_VALUE_MASK			0xff00
>>  #define READBACK_VALUE_SHIFT			8
>>  #define READBACK_ADD_HALF			BIT(7)
>> -#define READBACK_NEGATE				BIT(1)
>> +#define READBACK_NEGATE				BIT(0)
> 
> I haven't found this documented anywhere. The register documentation
> indicates that the SOC_THERM_TSENSOR_TEMP1 and SOC_THERM_TSENSOR_TEMP2
> registers are in some kind of "temp readback format", but I can't find
> any specification of that format. Can you point me at the source for
> this information and file an internal bug report so that we can get
> the documentation updated?

Sure, I will do it.
Thanks for your comment.

> 
> Thierry
> 
> * Unknown Key
> * 0x7F3EB3A1
> 

WARNING: multiple messages have this Message-ID (diff)
From: Wei Ni <wni@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: <rui.zhang@intel.com>, <MLongnecker@nvidia.com>,
	<mikko.perttunen@kapsi.fi>, <swarren@wwwdotorg.org>,
	<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] thermal: tegra_soctherm: fix sign bit of temperature
Date: Mon, 7 Mar 2016 16:45:16 +0800	[thread overview]
Message-ID: <56DD3F9C.3000700@nvidia.com> (raw)
In-Reply-To: <20160307083842.GC31189@ulmo.nvidia.com>



On 2016年03月07日 16:38, Thierry Reding wrote:
> * PGP Signed by an unknown key
> 
> On Mon, Feb 29, 2016 at 05:51:20PM +0800, Wei Ni wrote:
>> The sign bit of temperature readback is bit 0, not bit 1.
>> Change to BIT(0) to fix it.
>>
>> Signed-off-by: Wei Ni <wni@nvidia.com>
>> ---
>>  drivers/thermal/tegra_soctherm.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/thermal/tegra_soctherm.c b/drivers/thermal/tegra_soctherm.c
>> index 74ea5765938b..136975220c92 100644
>> --- a/drivers/thermal/tegra_soctherm.c
>> +++ b/drivers/thermal/tegra_soctherm.c
>> @@ -57,7 +57,7 @@
>>  #define READBACK_VALUE_MASK			0xff00
>>  #define READBACK_VALUE_SHIFT			8
>>  #define READBACK_ADD_HALF			BIT(7)
>> -#define READBACK_NEGATE				BIT(1)
>> +#define READBACK_NEGATE				BIT(0)
> 
> I haven't found this documented anywhere. The register documentation
> indicates that the SOC_THERM_TSENSOR_TEMP1 and SOC_THERM_TSENSOR_TEMP2
> registers are in some kind of "temp readback format", but I can't find
> any specification of that format. Can you point me at the source for
> this information and file an internal bug report so that we can get
> the documentation updated?

Sure, I will do it.
Thanks for your comment.

> 
> Thierry
> 
> * Unknown Key
> * 0x7F3EB3A1
> 

  parent reply	other threads:[~2016-03-07  8:45 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-29  9:51 [PATCH] thermal: tegra_soctherm: fix sign bit of temperature Wei Ni
2016-02-29  9:51 ` Wei Ni
     [not found] ` <1456739480-3304-1-git-send-email-wni-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-02  7:40   ` Wei Ni
2016-03-02  7:40     ` Wei Ni
     [not found]     ` <56D698FE.7070706-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-03  0:08       ` Matt Longnecker
2016-03-03  0:08         ` Matt Longnecker
     [not found]         ` <56D78081.6050106-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-07  8:26           ` Wei Ni
2016-03-07  8:26             ` Wei Ni
     [not found]             ` <56DD3B1E.4030805-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-03-07  8:55               ` Zhang, Rui
2016-03-07  8:55                 ` Zhang, Rui
     [not found]                 ` <744357E9AAD1214791ACBA4B0B9092633A9721DE-0J0gbvR4kThpB2pF5aRoyrfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2016-03-07  9:16                   ` Wei Ni
2016-03-07  9:16                     ` Wei Ni
2016-03-07 12:27                     ` Zhang, Rui
2016-03-07  8:32         ` Thierry Reding
2016-03-07  8:38   ` Thierry Reding
2016-03-07  8:38     ` Thierry Reding
     [not found]     ` <20160307083842.GC31189-AwZRO8vwLAwmlAP/+Wk3EA@public.gmane.org>
2016-03-07  8:45       ` Wei Ni [this message]
2016-03-07  8:45         ` Wei Ni

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