* [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
@ 2016-03-16 16:13 tim.gore
2016-03-17 9:36 ` ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3) Patchwork
2016-03-17 10:21 ` [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave Arun Siluvery
0 siblings, 2 replies; 5+ messages in thread
From: tim.gore @ 2016-03-16 16:13 UTC (permalink / raw)
To: intel-gfx
From: Tim Gore <tim.gore@intel.com>
This allows writes to EU flow control registers. Together
with SIP code from the user-mode driver this resolves a
hang seen in some pre-emption scenarios. Note that this
patch is just the kernel mode part of this workaround.
v2. Oops, add FLOW_CONTROL_ENABLE macro to i915_reg.h.
Signed-off-by: Tim Gore <tim.gore@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 85ceec6..adab0f0 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7103,6 +7103,7 @@ enum skl_disp_power_wells {
#define GEN9_CCS_TLB_PREFETCH_ENABLE (1<<3)
#define GEN8_ROW_CHICKEN _MMIO(0xe4f0)
+#define FLOW_CONTROL_ENABLE (1<<15)
#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
#define STALL_DOP_GATING_DISABLE (1<<5)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 015dc7d..b6f6b3b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -925,8 +925,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
ECOCHK_DIS_TLB);
+ /* WaClearFlowControlGpgpuContextSave:skl,bxt */
/* WaDisablePartialInstShootdown:skl,bxt */
WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
+ FLOW_CONTROL_ENABLE |
PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
/* Syncing dependencies between camera and graphics:skl,bxt */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread* ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3)
2016-03-16 16:13 [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave tim.gore
@ 2016-03-17 9:36 ` Patchwork
2016-03-17 10:57 ` Gore, Tim
2016-03-17 10:21 ` [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave Arun Siluvery
1 sibling, 1 reply; 5+ messages in thread
From: Patchwork @ 2016-03-17 9:36 UTC (permalink / raw)
To: tim.gore; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3)
URL : https://patchwork.freedesktop.org/series/4272/
State : failure
== Summary ==
Series 4272v3 drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
http://patchwork.freedesktop.org/api/1.0/series/4272/revisions/3/mbox/
Test gem_ringfill:
Subgroup basic-default-s3:
dmesg-warn -> PASS (bsw-nuc-2)
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
pass -> DMESG-WARN (hsw-brixbox)
Subgroup basic-plain-flip:
dmesg-warn -> PASS (hsw-gt2)
dmesg-warn -> PASS (hsw-brixbox)
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-c:
pass -> SKIP (hsw-brixbox)
Subgroup nonblocking-crc-pipe-a:
dmesg-warn -> PASS (hsw-brixbox)
Subgroup read-crc-pipe-b:
dmesg-warn -> PASS (hsw-gt2)
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (hsw-gt2)
bdw-nuci7 total:194 pass:181 dwarn:0 dfail:0 fail:0 skip:13
bdw-ultra total:194 pass:173 dwarn:0 dfail:0 fail:0 skip:21
bsw-nuc-2 total:194 pass:156 dwarn:1 dfail:0 fail:0 skip:37
byt-nuc total:194 pass:155 dwarn:4 dfail:0 fail:0 skip:35
hsw-brixbox total:194 pass:170 dwarn:1 dfail:0 fail:0 skip:23
hsw-gt2 total:194 pass:176 dwarn:1 dfail:0 fail:0 skip:17
ivb-t430s total:194 pass:169 dwarn:0 dfail:0 fail:0 skip:25
skl-i5k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
skl-i7k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
skl-nuci5 total:194 pass:183 dwarn:0 dfail:0 fail:0 skip:11
Results at /archive/results/CI_IGT_test/Patchwork_1622/
7107208595602ace943fb5afa0de1de45d62c2b8 drm-intel-nightly: 2016y-03m-17d-08h-36m-48s UTC integration manifest
2b37e8a951958145dbc808de3fbbdf4a54988fda drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3)
2016-03-17 9:36 ` ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3) Patchwork
@ 2016-03-17 10:57 ` Gore, Tim
2016-03-18 11:15 ` Tvrtko Ursulin
0 siblings, 1 reply; 5+ messages in thread
From: Gore, Tim @ 2016-03-17 10:57 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org
Tim Gore
Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
> -----Original Message-----
> From: Patchwork [mailto:patchwork@emeril.freedesktop.org]
> Sent: Thursday, March 17, 2016 9:36 AM
> To: Gore, Tim
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BAT: failure for drm/i915/gen9: add
> WaClearFlowControlGpgpuContextSave (rev3)
>
> == Series Details ==
>
> Series: drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3)
> URL : https://patchwork.freedesktop.org/series/4272/
> State : failure
>
> == Summary ==
>
> Series 4272v3 drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
> http://patchwork.freedesktop.org/api/1.0/series/4272/revisions/3/mbox/
>
> Test gem_ringfill:
> Subgroup basic-default-s3:
> dmesg-warn -> PASS (bsw-nuc-2)
> Test kms_flip:
> Subgroup basic-flip-vs-wf_vblank:
> pass -> DMESG-WARN (hsw-brixbox)
Usual "Device suspended during HW access", https://bugs.freedesktop.org/show_bug.cgi?id=94349
> Subgroup basic-plain-flip:
> dmesg-warn -> PASS (hsw-gt2)
> dmesg-warn -> PASS (hsw-brixbox)
> Test kms_pipe_crc_basic:
> Subgroup hang-read-crc-pipe-c:
> pass -> SKIP (hsw-brixbox)
This test is not shown in the Patchwork_1622 summary, not sure how it got in here!
> Subgroup nonblocking-crc-pipe-a:
> dmesg-warn -> PASS (hsw-brixbox)
> Subgroup read-crc-pipe-b:
> dmesg-warn -> PASS (hsw-gt2)
> Test pm_rpm:
> Subgroup basic-rte:
> pass -> DMESG-WARN (hsw-gt2)
Usual "Device suspended during HW access", https://bugs.freedesktop.org/show_bug.cgi?id=94349
>
> bdw-nuci7 total:194 pass:181 dwarn:0 dfail:0 fail:0 skip:13
> bdw-ultra total:194 pass:173 dwarn:0 dfail:0 fail:0 skip:21
> bsw-nuc-2 total:194 pass:156 dwarn:1 dfail:0 fail:0 skip:37
> byt-nuc total:194 pass:155 dwarn:4 dfail:0 fail:0 skip:35
> hsw-brixbox total:194 pass:170 dwarn:1 dfail:0 fail:0 skip:23
> hsw-gt2 total:194 pass:176 dwarn:1 dfail:0 fail:0 skip:17
> ivb-t430s total:194 pass:169 dwarn:0 dfail:0 fail:0 skip:25
> skl-i5k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
> skl-i7k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
> skl-nuci5 total:194 pass:183 dwarn:0 dfail:0 fail:0 skip:11
>
> Results at /archive/results/CI_IGT_test/Patchwork_1622/
>
> 7107208595602ace943fb5afa0de1de45d62c2b8 drm-intel-nightly: 2016y-03m-
> 17d-08h-36m-48s UTC integration manifest
> 2b37e8a951958145dbc808de3fbbdf4a54988fda drm/i915/gen9: add
> WaClearFlowControlGpgpuContextSave
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3)
2016-03-17 10:57 ` Gore, Tim
@ 2016-03-18 11:15 ` Tvrtko Ursulin
0 siblings, 0 replies; 5+ messages in thread
From: Tvrtko Ursulin @ 2016-03-18 11:15 UTC (permalink / raw)
To: Gore, Tim, intel-gfx@lists.freedesktop.org
On 17/03/16 10:57, Gore, Tim wrote:
> Tim Gore
> Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ
>
>
>> -----Original Message-----
>> From: Patchwork [mailto:patchwork@emeril.freedesktop.org]
>> Sent: Thursday, March 17, 2016 9:36 AM
>> To: Gore, Tim
>> Cc: intel-gfx@lists.freedesktop.org
>> Subject: ✗ Fi.CI.BAT: failure for drm/i915/gen9: add
>> WaClearFlowControlGpgpuContextSave (rev3)
>>
>> == Series Details ==
>>
>> Series: drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3)
>> URL : https://patchwork.freedesktop.org/series/4272/
>> State : failure
>>
>> == Summary ==
>>
>> Series 4272v3 drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
>> http://patchwork.freedesktop.org/api/1.0/series/4272/revisions/3/mbox/
>>
>> Test gem_ringfill:
>> Subgroup basic-default-s3:
>> dmesg-warn -> PASS (bsw-nuc-2)
>> Test kms_flip:
>> Subgroup basic-flip-vs-wf_vblank:
>> pass -> DMESG-WARN (hsw-brixbox)
>
> Usual "Device suspended during HW access", https://bugs.freedesktop.org/show_bug.cgi?id=94349
>
>> Subgroup basic-plain-flip:
>> dmesg-warn -> PASS (hsw-gt2)
>> dmesg-warn -> PASS (hsw-brixbox)
>> Test kms_pipe_crc_basic:
>> Subgroup hang-read-crc-pipe-c:
>> pass -> SKIP (hsw-brixbox)
>
> This test is not shown in the Patchwork_1622 summary, not sure how it got in here!
>
>> Subgroup nonblocking-crc-pipe-a:
>> dmesg-warn -> PASS (hsw-brixbox)
>> Subgroup read-crc-pipe-b:
>> dmesg-warn -> PASS (hsw-gt2)
>> Test pm_rpm:
>> Subgroup basic-rte:
>> pass -> DMESG-WARN (hsw-gt2)
>
> Usual "Device suspended during HW access", https://bugs.freedesktop.org/show_bug.cgi?id=94349
>
>>
>> bdw-nuci7 total:194 pass:181 dwarn:0 dfail:0 fail:0 skip:13
>> bdw-ultra total:194 pass:173 dwarn:0 dfail:0 fail:0 skip:21
>> bsw-nuc-2 total:194 pass:156 dwarn:1 dfail:0 fail:0 skip:37
>> byt-nuc total:194 pass:155 dwarn:4 dfail:0 fail:0 skip:35
>> hsw-brixbox total:194 pass:170 dwarn:1 dfail:0 fail:0 skip:23
>> hsw-gt2 total:194 pass:176 dwarn:1 dfail:0 fail:0 skip:17
>> ivb-t430s total:194 pass:169 dwarn:0 dfail:0 fail:0 skip:25
>> skl-i5k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
>> skl-i7k-2 total:194 pass:171 dwarn:0 dfail:0 fail:0 skip:23
>> skl-nuci5 total:194 pass:183 dwarn:0 dfail:0 fail:0 skip:11
>>
>> Results at /archive/results/CI_IGT_test/Patchwork_1622/
>>
>> 7107208595602ace943fb5afa0de1de45d62c2b8 drm-intel-nightly: 2016y-03m-
>> 17d-08h-36m-48s UTC integration manifest
>> 2b37e8a951958145dbc808de3fbbdf4a54988fda drm/i915/gen9: add
>> WaClearFlowControlGpgpuContextSave
Merged, thanks for the patch and review.
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
2016-03-16 16:13 [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave tim.gore
2016-03-17 9:36 ` ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3) Patchwork
@ 2016-03-17 10:21 ` Arun Siluvery
1 sibling, 0 replies; 5+ messages in thread
From: Arun Siluvery @ 2016-03-17 10:21 UTC (permalink / raw)
To: tim.gore, intel-gfx
On 16/03/2016 16:13, tim.gore@intel.com wrote:
> From: Tim Gore <tim.gore@intel.com>
>
> This allows writes to EU flow control registers. Together
> with SIP code from the user-mode driver this resolves a
> hang seen in some pre-emption scenarios. Note that this
> patch is just the kernel mode part of this workaround.
>
> v2. Oops, add FLOW_CONTROL_ENABLE macro to i915_reg.h.
>
> Signed-off-by: Tim Gore <tim.gore@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 85ceec6..adab0f0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7103,6 +7103,7 @@ enum skl_disp_power_wells {
> #define GEN9_CCS_TLB_PREFETCH_ENABLE (1<<3)
>
> #define GEN8_ROW_CHICKEN _MMIO(0xe4f0)
> +#define FLOW_CONTROL_ENABLE (1<<15)
> #define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> #define STALL_DOP_GATING_DISABLE (1<<5)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 015dc7d..b6f6b3b 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -925,8 +925,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
> I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
> ECOCHK_DIS_TLB);
>
> + /* WaClearFlowControlGpgpuContextSave:skl,bxt */
> /* WaDisablePartialInstShootdown:skl,bxt */
> WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
> + FLOW_CONTROL_ENABLE |
> PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
>
> /* Syncing dependencies between camera and graphics:skl,bxt */
>
looks good to me,
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
regards
Arun
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-03-18 11:15 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-03-16 16:13 [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave tim.gore
2016-03-17 9:36 ` ✗ Fi.CI.BAT: failure for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev3) Patchwork
2016-03-17 10:57 ` Gore, Tim
2016-03-18 11:15 ` Tvrtko Ursulin
2016-03-17 10:21 ` [PATCH v3] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave Arun Siluvery
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.