Re: [Qemu-devel] [PATCH 05/11] tcg/i386: Make direct jump patching thread-safe

[Sergey Fedorov <serge.fdrv@gmail.com>]

On 20/04/16 12:55, Alex Bennée wrote:
> Sergey Fedorov <sergey.fedorov@linaro.org> writes:
>> diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
>> index 9187d34caf6d..3ffb7b3124d8 100644
>> --- a/tcg/i386/tcg-target.inc.c
>> +++ b/tcg/i386/tcg-target.inc.c
>> @@ -1123,6 +1123,19 @@ static void tcg_out_jmp(TCGContext *s, tcg_insn_unit *dest)
>>      tcg_out_branch(s, 0, dest);
>>  }
>>
>> +static void tcg_out_nopn(TCGContext *s, int n)
>> +{
>> +    static const uint8_t nop1[] = { 0x90 };
>> +    static const uint8_t nop2[] = { 0x66, 0x90 };
>> +    static const uint8_t nop3[] = { 0x8d, 0x76, 0x00 };
>> +    static const uint8_t *const nopn[] = { nop1, nop2, nop3 };
>> +    int i;
>> +    assert(n <= ARRAY_SIZE(nopn));
>> +    for (i = 0; i < n; ++i) {
>> +        tcg_out8(s, nopn[n - 1][i]);
>> +    }
>> +}
> *shudder* I recall x86 instruction encoding is weird. Maybe a comment
>  for the function to describe the 3 forms of NOP we have here?

Okay.

>
>> +
>>  #if defined(CONFIG_SOFTMMU)
>>  /* helper signature: helper_ret_ld_mmu(CPUState *env, target_ulong addr,
>>   *                                     int mmu_idx, uintptr_t ra)
>> @@ -1777,6 +1790,10 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
>>      case INDEX_op_goto_tb:
>>          if (s->tb_jmp_offset) {
>>              /* direct jump method */
>> +            /* align jump displacement for atomic pathing */
> s/pathing/patching/

Nice catch, thanks :)
 
Kind regards,
Sergey