From: Jon Hunter <jonathanh@nvidia.com>
To: Penny Chiu <pchiu@nvidia.com>, <swarren@wwwdotorg.org>,
<thierry.reding@gmail.com>, <gnurou@gmail.com>,
<pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,
<rjw@rjwysocki.net>, <viresh.kumar@linaro.org>
Cc: <mturquette@baylibre.com>, <sboyd@codeaurora.org>,
<linux-tegra@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-pwm@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 10/11] arm64: tegra: Add clock properties on cpu0 for Tegra210
Date: Fri, 22 Apr 2016 12:44:21 +0100 [thread overview]
Message-ID: <571A0E95.9040203@nvidia.com> (raw)
In-Reply-To: <1461321071-6431-11-git-send-email-pchiu@nvidia.com>
Hi Penny,
On 22/04/16 11:31, Penny Chiu wrote:
> Add clocks, clock-names, and clock-latency into cpu0 node.
> These properties will be used by cpufreq driver.
>
> Signed-off-by: Penny Chiu <pchiu@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> index 204d9cd..1a85857 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> @@ -782,6 +782,12 @@
> device_type = "cpu";
> compatible = "arm,cortex-a57";
> reg = <0>;
> + clocks = <&tegra_car TEGRA210_CLK_CCLK_G>,
> + <&tegra_car TEGRA210_CLK_PLL_X>,
> + <&tegra_car TEGRA210_CLK_PLL_P_OUT4>,
> + <&dfll>;
> + clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
> + clock-latency = <300000>;
> };
>
> cpu@1 {
>
Can you include a patch with this series to update the binding
documentation for the nvidia,tegra124-cpufreq.txt? I think that although
there is no specific nvidia,tegra210-cpufreq compatible string the
documentation should state that both tegra124 and tegra210 are supported
so it is clear.
Also I see the above binding no longer includes the "cpu_lp" for
tegra210 which I understand we don't use here. However, the binding
documentation should reflect this. Having said that, looking at the
driver it appears the "cpu_lp" clock is not even used for tegra124. I
wonder if we should drop this from the binding documentation and the
tegra124.dtsi altogether?
What about the "vdd-cpu-supply" property? Don't we need this?
Cheers
Jon
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com>
To: Penny Chiu <pchiu@nvidia.com>,
swarren@wwwdotorg.org, thierry.reding@gmail.com,
gnurou@gmail.com, pdeschrijver@nvidia.com, pgaikwad@nvidia.com,
rjw@rjwysocki.net, viresh.kumar@linaro.org
Cc: mturquette@baylibre.com, sboyd@codeaurora.org,
linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-pm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 10/11] arm64: tegra: Add clock properties on cpu0 for Tegra210
Date: Fri, 22 Apr 2016 12:44:21 +0100 [thread overview]
Message-ID: <571A0E95.9040203@nvidia.com> (raw)
In-Reply-To: <1461321071-6431-11-git-send-email-pchiu@nvidia.com>
Hi Penny,
On 22/04/16 11:31, Penny Chiu wrote:
> Add clocks, clock-names, and clock-latency into cpu0 node.
> These properties will be used by cpufreq driver.
>
> Signed-off-by: Penny Chiu <pchiu@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> index 204d9cd..1a85857 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> @@ -782,6 +782,12 @@
> device_type = "cpu";
> compatible = "arm,cortex-a57";
> reg = <0>;
> + clocks = <&tegra_car TEGRA210_CLK_CCLK_G>,
> + <&tegra_car TEGRA210_CLK_PLL_X>,
> + <&tegra_car TEGRA210_CLK_PLL_P_OUT4>,
> + <&dfll>;
> + clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
> + clock-latency = <300000>;
> };
>
> cpu@1 {
>
Can you include a patch with this series to update the binding
documentation for the nvidia,tegra124-cpufreq.txt? I think that although
there is no specific nvidia,tegra210-cpufreq compatible string the
documentation should state that both tegra124 and tegra210 are supported
so it is clear.
Also I see the above binding no longer includes the "cpu_lp" for
tegra210 which I understand we don't use here. However, the binding
documentation should reflect this. Having said that, looking at the
driver it appears the "cpu_lp" clock is not even used for tegra124. I
wonder if we should drop this from the binding documentation and the
tegra124.dtsi altogether?
What about the "vdd-cpu-supply" property? Don't we need this?
Cheers
Jon
WARNING: multiple messages have this Message-ID (diff)
From: jonathanh@nvidia.com (Jon Hunter)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 10/11] arm64: tegra: Add clock properties on cpu0 for Tegra210
Date: Fri, 22 Apr 2016 12:44:21 +0100 [thread overview]
Message-ID: <571A0E95.9040203@nvidia.com> (raw)
In-Reply-To: <1461321071-6431-11-git-send-email-pchiu@nvidia.com>
Hi Penny,
On 22/04/16 11:31, Penny Chiu wrote:
> Add clocks, clock-names, and clock-latency into cpu0 node.
> These properties will be used by cpufreq driver.
>
> Signed-off-by: Penny Chiu <pchiu@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra210.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> index 204d9cd..1a85857 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
> @@ -782,6 +782,12 @@
> device_type = "cpu";
> compatible = "arm,cortex-a57";
> reg = <0>;
> + clocks = <&tegra_car TEGRA210_CLK_CCLK_G>,
> + <&tegra_car TEGRA210_CLK_PLL_X>,
> + <&tegra_car TEGRA210_CLK_PLL_P_OUT4>,
> + <&dfll>;
> + clock-names = "cpu_g", "pll_x", "pll_p", "dfll";
> + clock-latency = <300000>;
> };
>
> cpu at 1 {
>
Can you include a patch with this series to update the binding
documentation for the nvidia,tegra124-cpufreq.txt? I think that although
there is no specific nvidia,tegra210-cpufreq compatible string the
documentation should state that both tegra124 and tegra210 are supported
so it is clear.
Also I see the above binding no longer includes the "cpu_lp" for
tegra210 which I understand we don't use here. However, the binding
documentation should reflect this. Having said that, looking at the
driver it appears the "cpu_lp" clock is not even used for tegra124. I
wonder if we should drop this from the binding documentation and the
tegra124.dtsi altogether?
What about the "vdd-cpu-supply" property? Don't we need this?
Cheers
Jon
next prev parent reply other threads:[~2016-04-22 11:44 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-22 10:31 [PATCH 00/11] arm64: tegra: Add Tegra DFLL for Tegra210 Jetson TX1 Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` [PATCH 01/11] clk: tegra: dfll: Fix voltage comparison Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` [PATCH 02/11] clk: tegra: dfll: Move SoC specific data into of_device_id Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 13:04 ` Thierry Reding
2016-04-22 13:04 ` Thierry Reding
2016-04-22 10:31 ` [PATCH 03/11] clk: tegra: Add DFLL DVCO reset control for Tegra210 Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 13:11 ` Thierry Reding
2016-04-22 13:11 ` Thierry Reding
2016-04-22 10:31 ` [PATCH 04/11] clk: tegra: Add Tegra210 support in DFLL driver Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 13:16 ` Thierry Reding
2016-04-22 13:16 ` Thierry Reding
2016-04-22 10:31 ` [PATCH 05/11] pwm: tegra-dfll: Add driver for Tegra DFLL PWM controller Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 12:55 ` Thierry Reding
2016-04-22 12:55 ` Thierry Reding
2016-05-06 23:15 ` Stephen Boyd
2016-05-06 23:15 ` Stephen Boyd
2016-05-06 23:21 ` Stephen Warren
2016-05-06 23:21 ` Stephen Warren
2016-04-22 10:31 ` [PATCH 06/11] clk: tegra: dfll: Add PWM inferface Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` [PATCH 07/11] cpufreq: tegra124: Add Tegra210 support Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 11:00 ` Viresh Kumar
2016-04-22 11:00 ` Viresh Kumar
2016-04-22 11:00 ` Viresh Kumar
2016-04-22 10:31 ` [PATCH 08/11] arm64: tegra: Add PWM regulator for CPU rail on Jetson TX1 Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` [PATCH 09/11] arm64: tegra: Add DFLL clock node " Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 13:28 ` Thierry Reding
2016-04-22 13:28 ` Thierry Reding
2016-04-22 13:28 ` Thierry Reding
2016-04-22 10:31 ` [PATCH 10/11] arm64: tegra: Add clock properties on cpu0 for Tegra210 Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 11:44 ` Jon Hunter [this message]
2016-04-22 11:44 ` Jon Hunter
2016-04-22 11:44 ` Jon Hunter
2016-04-22 13:23 ` Thierry Reding
2016-04-22 13:23 ` Thierry Reding
2016-04-22 13:36 ` Jon Hunter
2016-04-22 13:36 ` Jon Hunter
2016-04-22 13:36 ` Jon Hunter
2016-04-22 10:31 ` [PATCH 11/11] arm64: config: Enable CPUFreq-DT, Tegra DFLL PWM, and PWM regulator Penny Chiu
2016-04-22 10:31 ` Penny Chiu
2016-04-22 10:31 ` Penny Chiu
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