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From: Marc Zyngier <marc.zyngier@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
	Christoffer Dall <christoffer.dall@linaro.org>
Cc: Eric Auger <eric.auger@linaro.org>,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] KVM: arm/arm64: new-vgic: add proper GICv2 CPU interface userland access
Date: Tue, 3 May 2016 18:59:15 +0100	[thread overview]
Message-ID: <5728E6F3.6000801@arm.com> (raw)
In-Reply-To: <5728D92A.9010503@arm.com>

On 03/05/16 18:00, Marc Zyngier wrote:
> On 03/05/16 17:07, Andre Przywara wrote:
>> Although the actual register access was wired, the availability check
>> for the GICv2 CPU interface register interface was not - leading to
>> any attempt of saving or restoring GICv2 CPU i/f registers to fail.
>>
>> This patch fixes this by modelling the CPU i/f registers similarily to
>> the distributor registers, thereby piggy backing on the existing
>> distributor save/restore code to do the heavy lifting.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Hi,
>>
>> this is a fix for the missing CPU i/f migration that Marc spotted.
>> In a repost I will merge this somehow into the existing patches, but
>> for now this goes on top of the series.
>> Can any of you have a look whether this is the right way to go?
> 
> The whole VMCR story feels very convoluted. It caters for GICv3 (which
> has no way to use it), has global symbols where it should be static,
> and indirections that serve no apparent purpose. And the vgic_vmcr
> structure should really per implementation. </rant> ;-)
> 
> So here's my take on this particular patch:

[... lots of stupid code deleted ...]

Which is completely wrong. I missed the case where we emulate GICv2 on GICv3. So, here's a much smaller patch that goes on top of yours (making the vmcr accessors static and reworking the MMIO handlers):

diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c
index dddd8e1..1967a52 100644
--- a/virt/kvm/arm/vgic/vgic-mmio-v2.c
+++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c
@@ -206,6 +206,22 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu,
 	}
 }
 
+static void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
+{
+	if (kvm_vgic_global_state.type == VGIC_V2)
+		vgic_v2_set_vmcr(vcpu, vmcr);
+	else
+		vgic_v3_set_vmcr(vcpu, vmcr);
+}
+
+static void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
+{
+	if (kvm_vgic_global_state.type == VGIC_V2)
+		vgic_v2_get_vmcr(vcpu, vmcr);
+	else
+		vgic_v3_get_vmcr(vcpu, vmcr);
+}
+
 #define GICC_ARCH_VERSION_V2	0x2
 
 /* These are for userland accesses only, there is no guest-facing emulation. */
@@ -213,33 +229,33 @@ static unsigned long vgic_mmio_read_vcpuif(struct kvm_vcpu *vcpu,
 					   gpa_t addr, unsigned int len)
 {
 	struct vgic_vmcr vmcr;
-	u32 *field;
+	u32 val;
+
+	vgic_get_vmcr(vcpu, &vmcr);
 
 	switch (addr & 0xff) {
 	case GIC_CPU_CTRL:
-		field = &vmcr.ctlr;
+		val = vmcr.ctlr;
 		break;
 	case GIC_CPU_PRIMASK:
-		field = &vmcr.pmr;
+		val = vmcr.pmr;
 		break;
 	case GIC_CPU_BINPOINT:
-		field = &vmcr.bpr;
+		val = vmcr.bpr;
 		break;
 	case GIC_CPU_ALIAS_BINPOINT:
-		field = &vmcr.abpr;
+		val = vmcr.abpr;
 		break;
 	case GIC_CPU_IDENT:
-		return extract_bytes((PRODUCT_ID_KVM << 20) |
-				     (GICC_ARCH_VERSION_V2 << 16) |
-				     (IMPLEMENTER_ARM << 0),
-				     addr & 3, len);
+		val = ((PRODUCT_ID_KVM << 20) |
+		       (GICC_ARCH_VERSION_V2 << 16) |
+		       IMPLEMENTER_ARM);
+		break;
 	default:
 		return 0;
 	}
 
-	vgic_get_vmcr(vcpu, &vmcr);
-
-	return extract_bytes(*field, addr & 3, len);
+	return extract_bytes(val, addr & 3, len);
 }
 
 static void vgic_mmio_write_vcpuif(struct kvm_vcpu *vcpu,
@@ -247,30 +263,24 @@ static void vgic_mmio_write_vcpuif(struct kvm_vcpu *vcpu,
 				   unsigned long val)
 {
 	struct vgic_vmcr vmcr;
-	u32 *field;
+
+	vgic_get_vmcr(vcpu, &vmcr);
 
 	switch (addr & 0xff) {
 	case GIC_CPU_CTRL:
-		field = &vmcr.ctlr;
+		vmcr.ctlr = val;
 		break;
 	case GIC_CPU_PRIMASK:
-		field = &vmcr.pmr;
+		vmcr.pmr = val;
 		break;
 	case GIC_CPU_BINPOINT:
-		field = &vmcr.bpr;
+		vmcr.bpr = val;
 		break;
 	case GIC_CPU_ALIAS_BINPOINT:
-		field = &vmcr.abpr;
+		vmcr.abpr = val;
 		break;
-	default:
-		return;
 	}
 
-	vgic_get_vmcr(vcpu, &vmcr);
-	if (*field == val)
-		return;
-
-	*field = val;
 	vgic_set_vmcr(vcpu, &vmcr);
 }
 
diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
index 5f21742..b22e2ac 100644
--- a/virt/kvm/arm/vgic/vgic.c
+++ b/virt/kvm/arm/vgic/vgic.c
@@ -482,22 +482,6 @@ static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
 		vgic_v3_set_underflow(vcpu);
 }
 
-void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
-{
-	if (kvm_vgic_global_state.type == VGIC_V2)
-		vgic_v2_set_vmcr(vcpu, vmcr);
-	else
-		vgic_v3_set_vmcr(vcpu, vmcr);
-}
-
-void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
-{
-	if (kvm_vgic_global_state.type == VGIC_V2)
-		vgic_v2_get_vmcr(vcpu, vmcr);
-	else
-		vgic_v3_get_vmcr(vcpu, vmcr);
-}
-
 static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
 {
 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index c1f3751..800be90 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -116,9 +116,6 @@ static inline int vgic_register_redist_iodevs(struct kvm *kvm,
 }
 #endif
 
-void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
-void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
-
 int vgic_lazy_init(struct kvm *kvm);
 int vgic_init(struct kvm *kvm);
 void kvm_register_vgic_device(unsigned long type);


Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] KVM: arm/arm64: new-vgic: add proper GICv2 CPU interface userland access
Date: Tue, 3 May 2016 18:59:15 +0100	[thread overview]
Message-ID: <5728E6F3.6000801@arm.com> (raw)
In-Reply-To: <5728D92A.9010503@arm.com>

On 03/05/16 18:00, Marc Zyngier wrote:
> On 03/05/16 17:07, Andre Przywara wrote:
>> Although the actual register access was wired, the availability check
>> for the GICv2 CPU interface register interface was not - leading to
>> any attempt of saving or restoring GICv2 CPU i/f registers to fail.
>>
>> This patch fixes this by modelling the CPU i/f registers similarily to
>> the distributor registers, thereby piggy backing on the existing
>> distributor save/restore code to do the heavy lifting.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
>> ---
>> Hi,
>>
>> this is a fix for the missing CPU i/f migration that Marc spotted.
>> In a repost I will merge this somehow into the existing patches, but
>> for now this goes on top of the series.
>> Can any of you have a look whether this is the right way to go?
> 
> The whole VMCR story feels very convoluted. It caters for GICv3 (which
> has no way to use it), has global symbols where it should be static,
> and indirections that serve no apparent purpose. And the vgic_vmcr
> structure should really per implementation. </rant> ;-)
> 
> So here's my take on this particular patch:

[... lots of stupid code deleted ...]

Which is completely wrong. I missed the case where we emulate GICv2 on GICv3. So, here's a much smaller patch that goes on top of yours (making the vmcr accessors static and reworking the MMIO handlers):

diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-v2.c
index dddd8e1..1967a52 100644
--- a/virt/kvm/arm/vgic/vgic-mmio-v2.c
+++ b/virt/kvm/arm/vgic/vgic-mmio-v2.c
@@ -206,6 +206,22 @@ static void vgic_mmio_write_sgipends(struct kvm_vcpu *vcpu,
 	}
 }
 
+static void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
+{
+	if (kvm_vgic_global_state.type == VGIC_V2)
+		vgic_v2_set_vmcr(vcpu, vmcr);
+	else
+		vgic_v3_set_vmcr(vcpu, vmcr);
+}
+
+static void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
+{
+	if (kvm_vgic_global_state.type == VGIC_V2)
+		vgic_v2_get_vmcr(vcpu, vmcr);
+	else
+		vgic_v3_get_vmcr(vcpu, vmcr);
+}
+
 #define GICC_ARCH_VERSION_V2	0x2
 
 /* These are for userland accesses only, there is no guest-facing emulation. */
@@ -213,33 +229,33 @@ static unsigned long vgic_mmio_read_vcpuif(struct kvm_vcpu *vcpu,
 					   gpa_t addr, unsigned int len)
 {
 	struct vgic_vmcr vmcr;
-	u32 *field;
+	u32 val;
+
+	vgic_get_vmcr(vcpu, &vmcr);
 
 	switch (addr & 0xff) {
 	case GIC_CPU_CTRL:
-		field = &vmcr.ctlr;
+		val = vmcr.ctlr;
 		break;
 	case GIC_CPU_PRIMASK:
-		field = &vmcr.pmr;
+		val = vmcr.pmr;
 		break;
 	case GIC_CPU_BINPOINT:
-		field = &vmcr.bpr;
+		val = vmcr.bpr;
 		break;
 	case GIC_CPU_ALIAS_BINPOINT:
-		field = &vmcr.abpr;
+		val = vmcr.abpr;
 		break;
 	case GIC_CPU_IDENT:
-		return extract_bytes((PRODUCT_ID_KVM << 20) |
-				     (GICC_ARCH_VERSION_V2 << 16) |
-				     (IMPLEMENTER_ARM << 0),
-				     addr & 3, len);
+		val = ((PRODUCT_ID_KVM << 20) |
+		       (GICC_ARCH_VERSION_V2 << 16) |
+		       IMPLEMENTER_ARM);
+		break;
 	default:
 		return 0;
 	}
 
-	vgic_get_vmcr(vcpu, &vmcr);
-
-	return extract_bytes(*field, addr & 3, len);
+	return extract_bytes(val, addr & 3, len);
 }
 
 static void vgic_mmio_write_vcpuif(struct kvm_vcpu *vcpu,
@@ -247,30 +263,24 @@ static void vgic_mmio_write_vcpuif(struct kvm_vcpu *vcpu,
 				   unsigned long val)
 {
 	struct vgic_vmcr vmcr;
-	u32 *field;
+
+	vgic_get_vmcr(vcpu, &vmcr);
 
 	switch (addr & 0xff) {
 	case GIC_CPU_CTRL:
-		field = &vmcr.ctlr;
+		vmcr.ctlr = val;
 		break;
 	case GIC_CPU_PRIMASK:
-		field = &vmcr.pmr;
+		vmcr.pmr = val;
 		break;
 	case GIC_CPU_BINPOINT:
-		field = &vmcr.bpr;
+		vmcr.bpr = val;
 		break;
 	case GIC_CPU_ALIAS_BINPOINT:
-		field = &vmcr.abpr;
+		vmcr.abpr = val;
 		break;
-	default:
-		return;
 	}
 
-	vgic_get_vmcr(vcpu, &vmcr);
-	if (*field == val)
-		return;
-
-	*field = val;
 	vgic_set_vmcr(vcpu, &vmcr);
 }
 
diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
index 5f21742..b22e2ac 100644
--- a/virt/kvm/arm/vgic/vgic.c
+++ b/virt/kvm/arm/vgic/vgic.c
@@ -482,22 +482,6 @@ static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
 		vgic_v3_set_underflow(vcpu);
 }
 
-void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
-{
-	if (kvm_vgic_global_state.type == VGIC_V2)
-		vgic_v2_set_vmcr(vcpu, vmcr);
-	else
-		vgic_v3_set_vmcr(vcpu, vmcr);
-}
-
-void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
-{
-	if (kvm_vgic_global_state.type == VGIC_V2)
-		vgic_v2_get_vmcr(vcpu, vmcr);
-	else
-		vgic_v3_get_vmcr(vcpu, vmcr);
-}
-
 static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
 {
 	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
index c1f3751..800be90 100644
--- a/virt/kvm/arm/vgic/vgic.h
+++ b/virt/kvm/arm/vgic/vgic.h
@@ -116,9 +116,6 @@ static inline int vgic_register_redist_iodevs(struct kvm *kvm,
 }
 #endif
 
-void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
-void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
-
 int vgic_lazy_init(struct kvm *kvm);
 int vgic_init(struct kvm *kvm);
 void kvm_register_vgic_device(unsigned long type);


Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2016-05-03 17:59 UTC|newest]

Thread overview: 189+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-28 16:45 [PATCH v2 00/54] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-04-28 16:45 ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 01/54] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 02/54] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 03/54] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 04/54] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 05/54] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-03 12:15   ` Marc Zyngier
2016-05-03 12:15     ` Marc Zyngier
2016-04-28 16:45 ` [PATCH v2 06/54] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-02 16:44   ` Eric Auger
2016-05-02 16:44     ` Eric Auger
2016-05-04 10:37     ` Andre Przywara
2016-05-04 10:37       ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 07/54] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-03 22:22   ` Tom Hanson
2016-05-03 22:22     ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 08/54] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 09/54] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 10/54] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 11/54] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 12/54] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 13/54] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 14/54] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-03 23:46   ` Tom Hanson
2016-05-03 23:46     ` Tom Hanson
2016-05-05 11:24     ` Andre Przywara
2016-05-05 11:24       ` Andre Przywara
2016-05-05 14:43       ` Marc Zyngier
2016-05-05 14:43         ` Marc Zyngier
2016-05-05 16:34       ` Tom Hanson
2016-05-05 16:34         ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 15/54] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 16/54] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-05 16:23   ` Tom Hanson
2016-05-05 16:23     ` Tom Hanson
2016-05-05 16:44     ` Tom Hanson
2016-05-05 16:44       ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 17/54] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-02 12:16   ` Marc Zyngier
2016-05-02 12:16     ` Marc Zyngier
2016-05-02 12:16     ` Marc Zyngier
2016-05-03  8:26     ` Andre Przywara
2016-05-03  8:26       ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 18/54] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-03 16:16   ` Marc Zyngier
2016-05-03 16:16     ` Marc Zyngier
2016-05-04 13:30     ` Andre Przywara
2016-05-04 13:30       ` Andre Przywara
2016-05-04 13:54       ` Marc Zyngier
2016-05-04 13:54         ` Marc Zyngier
2016-05-04 14:21         ` [PATCH] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-04 14:21           ` Andre Przywara
2016-05-04 14:28           ` Marc Zyngier
2016-05-04 14:28             ` Marc Zyngier
2016-05-05 17:04   ` [PATCH v2 18/54] KVM: arm/arm64: vgic-new: Add GICv3 world switch backend Tom Hanson
2016-05-05 17:04     ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 19/54] KVM: arm/arm64: vgic-new: Implement Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-02 12:24   ` Eric Auger
2016-05-02 12:24     ` Eric Auger
2016-05-03  8:26     ` Andre Przywara
2016-05-03  8:26       ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 20/54] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 21/54] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-03 15:32   ` Marc Zyngier
2016-05-03 15:32     ` Marc Zyngier
2016-04-28 16:45 ` [PATCH v2 22/54] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 23/54] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 24/54] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 25/54] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 26/54] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-05-05 16:48   ` Tom Hanson
2016-05-05 16:48     ` Tom Hanson
2016-04-28 16:45 ` [PATCH v2 27/54] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 28/54] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 29/54] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 30/54] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 31/54] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 32/54] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-29 14:04   ` Vladimir Murzin
2016-04-29 14:04     ` Vladimir Murzin
2016-04-29 14:22     ` Vladimir Murzin
2016-04-29 14:22       ` Vladimir Murzin
2016-05-02  8:38       ` Christoffer Dall
2016-05-02  8:38         ` Christoffer Dall
2016-05-02 16:13   ` Eric Auger
2016-05-02 16:13     ` Eric Auger
2016-05-05 17:55     ` Andre Przywara
2016-05-05 17:55       ` Andre Przywara
2016-05-03 15:34   ` Marc Zyngier
2016-05-03 15:34     ` Marc Zyngier
2016-04-28 16:45 ` [PATCH v2 33/54] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 34/54] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 35/54] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 36/54] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 37/54] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 38/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 39/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:45 ` [PATCH v2 40/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-04-28 16:45   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 41/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 42/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-05-03  9:59   ` Marc Zyngier
2016-05-03  9:59     ` Marc Zyngier
2016-05-03 10:09     ` Andre Przywara
2016-05-03 10:09       ` Andre Przywara
2016-05-03 10:12       ` Marc Zyngier
2016-05-03 10:12         ` Marc Zyngier
2016-05-03 10:16       ` Marc Zyngier
2016-05-03 10:16         ` Marc Zyngier
2016-05-03 16:07         ` [PATCH] KVM: arm/arm64: new-vgic: add proper GICv2 CPU interface userland access Andre Przywara
2016-05-03 16:07           ` Andre Przywara
2016-05-03 17:00           ` Marc Zyngier
2016-05-03 17:00             ` Marc Zyngier
2016-05-03 17:59             ` Marc Zyngier [this message]
2016-05-03 17:59               ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 43/54] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 44/54] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 45/54] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 46/54] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-05-03 10:21   ` Marc Zyngier
2016-05-03 10:21     ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 47/54] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-05-03 15:02   ` Marc Zyngier
2016-05-03 15:02     ` Marc Zyngier
2016-05-03 15:35   ` Marc Zyngier
2016-05-03 15:35     ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 48/54] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 49/54] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 50/54] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-05-03 10:47   ` Marc Zyngier
2016-05-03 10:47     ` Marc Zyngier
2016-04-28 16:46 ` [PATCH v2 51/54] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 52/54] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 53/54] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-04-28 16:46   ` Andre Przywara
2016-04-28 16:46 ` [PATCH v2 54/54] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-04-28 16:46   ` Andre Przywara

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