From: Marc Zyngier <marc.zyngier@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
Christoffer Dall <christoffer.dall@linaro.org>
Cc: Eric Auger <eric.auger@linaro.org>,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 18/56] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework
Date: Tue, 17 May 2016 11:55:29 +0100 [thread overview]
Message-ID: <573AF8A1.2080506@arm.com> (raw)
In-Reply-To: <1463392481-26583-19-git-send-email-andre.przywara@arm.com>
On 16/05/16 10:53, Andre Przywara wrote:
> From: Marc Zyngier <marc.zyngier@arm.com>
>
> Implement the framework for syncing IRQs between our emulation and
> the list registers, which represent the guest's view of IRQs.
> This is done in kvm_vgic_flush_hwstate and kvm_vgic_sync_hwstate,
> which gets called on guest entry and exit.
> The code talking to the actual GICv2/v3 hardware is added in the
> following patches.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@linaro.org>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Eric Auger <eric.auger@linaro.org>
> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
> ---
> Changelog RFC..v1:
> - split out vgic_clear_lr() from vgic_populate_lr()
> - rename vgic_populate_lrs() to vgic_flush_lr_state()
> - clean all LRs when the distributor is disabled
> - use list_del() instead of list_del_init()
> - add comments to explain the direction of sync/flush_hwstate
> - remove unneeded BUG_ON(in_interrupt()
>
> Changelog v2 .. v3:
> - remove bogus v2 specific rebase leftovers
>
> Changelog v3 .. v4:
> - amend locks requirements
>
> include/kvm/vgic/vgic.h | 4 +
> virt/kvm/arm/vgic/vgic.c | 191 +++++++++++++++++++++++++++++++++++++++++++++++
> virt/kvm/arm/vgic/vgic.h | 2 +
> 3 files changed, 197 insertions(+)
>
> diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h
> index 7b6ca90..9506267 100644
> --- a/include/kvm/vgic/vgic.h
> +++ b/include/kvm/vgic/vgic.h
> @@ -190,6 +190,10 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
> #define vgic_valid_spi(k, i) (((i) >= VGIC_NR_PRIVATE_IRQS) && \
> ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
>
> +bool kvm_vcpu_has_pending_irqs(struct kvm_vcpu *vcpu);
> +void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
> +void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
> +
> /**
> * kvm_vgic_get_max_vcpus - Get the maximum number of VCPUs allowed by HW
> *
> diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
> index 1bc8f92..613fbd1 100644
> --- a/virt/kvm/arm/vgic/vgic.c
> +++ b/virt/kvm/arm/vgic/vgic.c
> @@ -307,3 +307,194 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
> {
> return vgic_update_irq_pending(kvm, cpuid, intid, level, false);
> }
> +
> +/**
> + * vgic_prune_ap_list - Remove non-relevant interrupts from the list
> + *
> + * @vcpu: The VCPU pointer
> + *
> + * Go over the list of "interesting" interrupts, and prune those that we
> + * won't have to consider in the near future.
> + */
> +static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
> +{
> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
> + struct vgic_irq *irq, *tmp;
> +
> +retry:
> + spin_lock(&vgic_cpu->ap_list_lock);
> +
> + list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
> + struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
> +
> + spin_lock(&irq->irq_lock);
> +
> + BUG_ON(vcpu != irq->vcpu);
> +
> + target_vcpu = vgic_target_oracle(irq);
> +
> + if (!target_vcpu) {
> + /*
> + * We don't need to process this interrupt any
> + * further, move it off the list.
> + */
> + list_del(&irq->ap_list);
> + irq->vcpu = NULL;
> + spin_unlock(&irq->irq_lock);
> + continue;
> + }
> +
> + if (target_vcpu == vcpu) {
> + /* We're on the right CPU */
> + spin_unlock(&irq->irq_lock);
> + continue;
> + }
> +
> + /* This interrupt looks like it has to be migrated. */
> +
> + spin_unlock(&irq->irq_lock);
> + spin_unlock(&vgic_cpu->ap_list_lock);
> +
> + /*
> + * Ensure locking order by always locking the smallest
> + * ID first.
> + */
> + if (vcpu->vcpu_id < target_vcpu->vcpu_id) {
> + vcpuA = vcpu;
> + vcpuB = target_vcpu;
> + } else {
> + vcpuA = target_vcpu;
> + vcpuB = vcpu;
> + }
> +
> + spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock);
> + spin_lock(&vcpuB->arch.vgic_cpu.ap_list_lock);
> + spin_lock(&irq->irq_lock);
> +
> + /*
> + * If the affinity has been preserved, move the
> + * interrupt around. Otherwise, it means things have
> + * changed while the interrupt was unlocked, and we
> + * need to replay this.
> + *
> + * In all cases, we cannot trust the list not to have
> + * changed, so we restart from the beginning.
> + */
> + if (target_vcpu == vgic_target_oracle(irq)) {
> + struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu;
> +
> + list_del(&irq->ap_list);
> + irq->vcpu = target_vcpu;
> + list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
> + }
> +
> + spin_unlock(&irq->irq_lock);
> + spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
> + spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock);
> + goto retry;
> + }
> +
> + spin_unlock(&vgic_cpu->ap_list_lock);
> +}
> +
> +static inline void vgic_process_maintenance_interrupt(struct kvm_vcpu *vcpu)
> +{
> +}
> +
> +static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
> +{
> +}
> +
> +/* Requires the irq_lock to be held. */
> +static inline void vgic_populate_lr(struct kvm_vcpu *vcpu,
> + struct vgic_irq *irq, int lr)
> +{
> + DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
> +}
> +
> +static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr)
> +{
> +}
> +
> +static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
> +{
> +}
> +
> +/* Requires the ap_list_lock to be held. */
> +static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
> +{
> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
> + struct vgic_irq *irq;
> + int count = 0;
> +
> + DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
> +
> + list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
> + spin_lock(&irq->irq_lock);
> + /* GICv2 SGIs can count for more than one... */
> + if (vgic_irq_is_sgi(irq->intid) && irq->source)
> + count += hweight8(irq->source);
> + else
> + count++;
> + spin_unlock(&irq->irq_lock);
> + }
> + return count;
> +}
> +
> +/* Requires the VCPU's ap_list_lock to be held. */
> +static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
> +{
> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
> + struct vgic_irq *irq;
> + int count = 0;
> +
> + DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
> +
> + if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr) {
> + vgic_set_underflow(vcpu);
> + vgic_sort_ap_list(vcpu);
> + }
> +
> + list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
> + spin_lock(&irq->irq_lock);
> +
> + if (unlikely(vgic_target_oracle(irq) != vcpu))
> + goto next;
> +
> + /*
> + * If we get an SGI with multiple sources, try to get
> + * them in all at once.
> + */
Nit: this comment is out of place, and is a duplicate of the one in
compute_ap_list_depth().
> + do {
> + vgic_populate_lr(vcpu, irq, count++);
> + } while (irq->source && count < kvm_vgic_global_state.nr_lr);
> +
> +next:
> + spin_unlock(&irq->irq_lock);
> +
> + if (count == kvm_vgic_global_state.nr_lr)
> + break;
> + }
> +
> + vcpu->arch.vgic_cpu.used_lrs = count;
> +
> + /* Nuke remaining LRs */
> + for ( ; count < kvm_vgic_global_state.nr_lr; count++)
> + vgic_clear_lr(vcpu, count);
> +}
> +
> +/* Sync back the hardware VGIC state into our emulation after a guest's run. */
> +void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
> +{
> + vgic_process_maintenance_interrupt(vcpu);
> + vgic_fold_lr_state(vcpu);
> + vgic_prune_ap_list(vcpu);
> +}
> +
> +/* Flush our emulation state into the GIC hardware before entering the guest. */
> +void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
> +{
> + spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
> + vgic_flush_lr_state(vcpu);
> + spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
> +}
> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
> index c625767..29b96b9 100644
> --- a/virt/kvm/arm/vgic/vgic.h
> +++ b/virt/kvm/arm/vgic/vgic.h
> @@ -16,6 +16,8 @@
> #ifndef __KVM_ARM_VGIC_NEW_H__
> #define __KVM_ARM_VGIC_NEW_H__
>
> +#define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS)
> +
> struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
> u32 intid);
> bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq);
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 18/56] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework
Date: Tue, 17 May 2016 11:55:29 +0100 [thread overview]
Message-ID: <573AF8A1.2080506@arm.com> (raw)
In-Reply-To: <1463392481-26583-19-git-send-email-andre.przywara@arm.com>
On 16/05/16 10:53, Andre Przywara wrote:
> From: Marc Zyngier <marc.zyngier@arm.com>
>
> Implement the framework for syncing IRQs between our emulation and
> the list registers, which represent the guest's view of IRQs.
> This is done in kvm_vgic_flush_hwstate and kvm_vgic_sync_hwstate,
> which gets called on guest entry and exit.
> The code talking to the actual GICv2/v3 hardware is added in the
> following patches.
>
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@linaro.org>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> Reviewed-by: Eric Auger <eric.auger@linaro.org>
> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
> ---
> Changelog RFC..v1:
> - split out vgic_clear_lr() from vgic_populate_lr()
> - rename vgic_populate_lrs() to vgic_flush_lr_state()
> - clean all LRs when the distributor is disabled
> - use list_del() instead of list_del_init()
> - add comments to explain the direction of sync/flush_hwstate
> - remove unneeded BUG_ON(in_interrupt()
>
> Changelog v2 .. v3:
> - remove bogus v2 specific rebase leftovers
>
> Changelog v3 .. v4:
> - amend locks requirements
>
> include/kvm/vgic/vgic.h | 4 +
> virt/kvm/arm/vgic/vgic.c | 191 +++++++++++++++++++++++++++++++++++++++++++++++
> virt/kvm/arm/vgic/vgic.h | 2 +
> 3 files changed, 197 insertions(+)
>
> diff --git a/include/kvm/vgic/vgic.h b/include/kvm/vgic/vgic.h
> index 7b6ca90..9506267 100644
> --- a/include/kvm/vgic/vgic.h
> +++ b/include/kvm/vgic/vgic.h
> @@ -190,6 +190,10 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
> #define vgic_valid_spi(k, i) (((i) >= VGIC_NR_PRIVATE_IRQS) && \
> ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))
>
> +bool kvm_vcpu_has_pending_irqs(struct kvm_vcpu *vcpu);
> +void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu);
> +void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);
> +
> /**
> * kvm_vgic_get_max_vcpus - Get the maximum number of VCPUs allowed by HW
> *
> diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
> index 1bc8f92..613fbd1 100644
> --- a/virt/kvm/arm/vgic/vgic.c
> +++ b/virt/kvm/arm/vgic/vgic.c
> @@ -307,3 +307,194 @@ int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid, unsigned int intid,
> {
> return vgic_update_irq_pending(kvm, cpuid, intid, level, false);
> }
> +
> +/**
> + * vgic_prune_ap_list - Remove non-relevant interrupts from the list
> + *
> + * @vcpu: The VCPU pointer
> + *
> + * Go over the list of "interesting" interrupts, and prune those that we
> + * won't have to consider in the near future.
> + */
> +static void vgic_prune_ap_list(struct kvm_vcpu *vcpu)
> +{
> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
> + struct vgic_irq *irq, *tmp;
> +
> +retry:
> + spin_lock(&vgic_cpu->ap_list_lock);
> +
> + list_for_each_entry_safe(irq, tmp, &vgic_cpu->ap_list_head, ap_list) {
> + struct kvm_vcpu *target_vcpu, *vcpuA, *vcpuB;
> +
> + spin_lock(&irq->irq_lock);
> +
> + BUG_ON(vcpu != irq->vcpu);
> +
> + target_vcpu = vgic_target_oracle(irq);
> +
> + if (!target_vcpu) {
> + /*
> + * We don't need to process this interrupt any
> + * further, move it off the list.
> + */
> + list_del(&irq->ap_list);
> + irq->vcpu = NULL;
> + spin_unlock(&irq->irq_lock);
> + continue;
> + }
> +
> + if (target_vcpu == vcpu) {
> + /* We're on the right CPU */
> + spin_unlock(&irq->irq_lock);
> + continue;
> + }
> +
> + /* This interrupt looks like it has to be migrated. */
> +
> + spin_unlock(&irq->irq_lock);
> + spin_unlock(&vgic_cpu->ap_list_lock);
> +
> + /*
> + * Ensure locking order by always locking the smallest
> + * ID first.
> + */
> + if (vcpu->vcpu_id < target_vcpu->vcpu_id) {
> + vcpuA = vcpu;
> + vcpuB = target_vcpu;
> + } else {
> + vcpuA = target_vcpu;
> + vcpuB = vcpu;
> + }
> +
> + spin_lock(&vcpuA->arch.vgic_cpu.ap_list_lock);
> + spin_lock(&vcpuB->arch.vgic_cpu.ap_list_lock);
> + spin_lock(&irq->irq_lock);
> +
> + /*
> + * If the affinity has been preserved, move the
> + * interrupt around. Otherwise, it means things have
> + * changed while the interrupt was unlocked, and we
> + * need to replay this.
> + *
> + * In all cases, we cannot trust the list not to have
> + * changed, so we restart from the beginning.
> + */
> + if (target_vcpu == vgic_target_oracle(irq)) {
> + struct vgic_cpu *new_cpu = &target_vcpu->arch.vgic_cpu;
> +
> + list_del(&irq->ap_list);
> + irq->vcpu = target_vcpu;
> + list_add_tail(&irq->ap_list, &new_cpu->ap_list_head);
> + }
> +
> + spin_unlock(&irq->irq_lock);
> + spin_unlock(&vcpuB->arch.vgic_cpu.ap_list_lock);
> + spin_unlock(&vcpuA->arch.vgic_cpu.ap_list_lock);
> + goto retry;
> + }
> +
> + spin_unlock(&vgic_cpu->ap_list_lock);
> +}
> +
> +static inline void vgic_process_maintenance_interrupt(struct kvm_vcpu *vcpu)
> +{
> +}
> +
> +static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
> +{
> +}
> +
> +/* Requires the irq_lock to be held. */
> +static inline void vgic_populate_lr(struct kvm_vcpu *vcpu,
> + struct vgic_irq *irq, int lr)
> +{
> + DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&irq->irq_lock));
> +}
> +
> +static inline void vgic_clear_lr(struct kvm_vcpu *vcpu, int lr)
> +{
> +}
> +
> +static inline void vgic_set_underflow(struct kvm_vcpu *vcpu)
> +{
> +}
> +
> +/* Requires the ap_list_lock to be held. */
> +static int compute_ap_list_depth(struct kvm_vcpu *vcpu)
> +{
> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
> + struct vgic_irq *irq;
> + int count = 0;
> +
> + DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
> +
> + list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
> + spin_lock(&irq->irq_lock);
> + /* GICv2 SGIs can count for more than one... */
> + if (vgic_irq_is_sgi(irq->intid) && irq->source)
> + count += hweight8(irq->source);
> + else
> + count++;
> + spin_unlock(&irq->irq_lock);
> + }
> + return count;
> +}
> +
> +/* Requires the VCPU's ap_list_lock to be held. */
> +static void vgic_flush_lr_state(struct kvm_vcpu *vcpu)
> +{
> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
> + struct vgic_irq *irq;
> + int count = 0;
> +
> + DEBUG_SPINLOCK_BUG_ON(!spin_is_locked(&vgic_cpu->ap_list_lock));
> +
> + if (compute_ap_list_depth(vcpu) > kvm_vgic_global_state.nr_lr) {
> + vgic_set_underflow(vcpu);
> + vgic_sort_ap_list(vcpu);
> + }
> +
> + list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
> + spin_lock(&irq->irq_lock);
> +
> + if (unlikely(vgic_target_oracle(irq) != vcpu))
> + goto next;
> +
> + /*
> + * If we get an SGI with multiple sources, try to get
> + * them in all at once.
> + */
Nit: this comment is out of place, and is a duplicate of the one in
compute_ap_list_depth().
> + do {
> + vgic_populate_lr(vcpu, irq, count++);
> + } while (irq->source && count < kvm_vgic_global_state.nr_lr);
> +
> +next:
> + spin_unlock(&irq->irq_lock);
> +
> + if (count == kvm_vgic_global_state.nr_lr)
> + break;
> + }
> +
> + vcpu->arch.vgic_cpu.used_lrs = count;
> +
> + /* Nuke remaining LRs */
> + for ( ; count < kvm_vgic_global_state.nr_lr; count++)
> + vgic_clear_lr(vcpu, count);
> +}
> +
> +/* Sync back the hardware VGIC state into our emulation after a guest's run. */
> +void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
> +{
> + vgic_process_maintenance_interrupt(vcpu);
> + vgic_fold_lr_state(vcpu);
> + vgic_prune_ap_list(vcpu);
> +}
> +
> +/* Flush our emulation state into the GIC hardware before entering the guest. */
> +void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu)
> +{
> + spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
> + vgic_flush_lr_state(vcpu);
> + spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
> +}
> diff --git a/virt/kvm/arm/vgic/vgic.h b/virt/kvm/arm/vgic/vgic.h
> index c625767..29b96b9 100644
> --- a/virt/kvm/arm/vgic/vgic.h
> +++ b/virt/kvm/arm/vgic/vgic.h
> @@ -16,6 +16,8 @@
> #ifndef __KVM_ARM_VGIC_NEW_H__
> #define __KVM_ARM_VGIC_NEW_H__
>
> +#define vgic_irq_is_sgi(intid) ((intid) < VGIC_NR_SGIS)
> +
> struct vgic_irq *vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu,
> u32 intid);
> bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq);
>
Thanks,
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2016-05-17 10:55 UTC|newest]
Thread overview: 316+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-16 9:52 [PATCH v4 00/56] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 01/56] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 02/56] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 03/56] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 04/56] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 05/56] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 06/56] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 07/56] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 08/56] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 09/56] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 10/56] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-16 9:52 ` [PATCH v4 11/56] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-05-16 9:52 ` Andre Przywara
2016-05-18 10:27 ` Christoffer Dall
2016-05-18 10:27 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 12/56] KVM: arm/arm64: Provide functionality to pause and resume a guest Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 13/56] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 14/56] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 15/56] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 16/56] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:14 ` Christoffer Dall
2016-05-18 14:14 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 17/56] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 11:49 ` Christoffer Dall
2016-05-18 11:49 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 18/56] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-17 10:55 ` Marc Zyngier [this message]
2016-05-17 10:55 ` Marc Zyngier
2016-05-16 9:53 ` [PATCH v4 19/56] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 20/56] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:14 ` Christoffer Dall
2016-05-18 14:14 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 21/56] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 22/56] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-17 13:33 ` Marc Zyngier
2016-05-17 13:33 ` Marc Zyngier
2016-05-18 12:25 ` Christoffer Dall
2016-05-18 12:25 ` Christoffer Dall
2016-05-18 14:12 ` Marc Zyngier
2016-05-18 14:12 ` Marc Zyngier
2016-05-18 14:29 ` Christoffer Dall
2016-05-18 14:29 ` Christoffer Dall
2016-05-18 16:46 ` Andre Przywara
2016-05-18 16:46 ` Andre Przywara
2016-05-18 17:08 ` Christoffer Dall
2016-05-18 17:08 ` Christoffer Dall
2016-05-18 12:31 ` Christoffer Dall
2016-05-18 12:31 ` Christoffer Dall
2016-05-18 15:55 ` Andre Przywara
2016-05-18 15:55 ` Andre Przywara
2016-05-18 18:06 ` Christoffer Dall
2016-05-18 18:06 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 23/56] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 24/56] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 12:33 ` Christoffer Dall
2016-05-18 12:33 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 25/56] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:14 ` Christoffer Dall
2016-05-18 14:14 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 26/56] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:15 ` Christoffer Dall
2016-05-18 14:15 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 27/56] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:01 ` Christoffer Dall
2016-05-18 13:01 ` Christoffer Dall
2016-05-19 10:12 ` Andre Przywara
2016-05-19 10:12 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 28/56] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:15 ` Christoffer Dall
2016-05-18 14:15 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 29/56] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:08 ` Christoffer Dall
2016-05-18 13:08 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 30/56] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:15 ` Christoffer Dall
2016-05-18 14:15 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 31/56] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 32/56] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:14 ` Christoffer Dall
2016-05-18 13:14 ` Christoffer Dall
2016-05-18 13:31 ` Andre Przywara
2016-05-18 13:31 ` Andre Przywara
2016-05-18 13:50 ` Christoffer Dall
2016-05-18 13:50 ` Christoffer Dall
2016-05-19 13:25 ` Andre Przywara
2016-05-19 13:25 ` Andre Przywara
2016-05-19 14:09 ` Christoffer Dall
2016-05-19 14:09 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 33/56] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:21 ` Christoffer Dall
2016-05-18 13:21 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 34/56] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:15 ` Christoffer Dall
2016-05-18 14:15 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 35/56] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:15 ` Christoffer Dall
2016-05-18 14:15 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 36/56] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:14 ` Christoffer Dall
2016-05-18 14:14 ` Christoffer Dall
2016-05-18 14:16 ` Christoffer Dall
2016-05-18 14:16 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 37/56] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:49 ` Christoffer Dall
2016-05-18 13:49 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 38/56] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:53 ` Christoffer Dall
2016-05-18 13:53 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 39/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 40/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 41/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 42/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 43/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 44/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:55 ` Christoffer Dall
2016-05-18 13:55 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 45/56] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 46/56] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:57 ` Christoffer Dall
2016-05-18 13:57 ` Christoffer Dall
2016-05-18 14:06 ` Andre Przywara
2016-05-18 14:06 ` Andre Przywara
2016-05-18 15:12 ` Christoffer Dall
2016-05-18 15:12 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 47/56] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 13:59 ` Christoffer Dall
2016-05-18 13:59 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 48/56] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:02 ` Christoffer Dall
2016-05-18 14:02 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 49/56] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:08 ` Christoffer Dall
2016-05-18 14:08 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 50/56] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-18 14:11 ` Christoffer Dall
2016-05-18 14:11 ` Christoffer Dall
2016-05-16 9:53 ` [PATCH v4 51/56] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 52/56] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 53/56] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 54/56] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 55/56] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 56/56] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 00/56] KVM: arm/arm64: Rework virtual GIC emulation Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 10:14 ` Andre Przywara
2016-05-16 10:14 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 01/56] KVM: arm/arm64: vgic: streamline vgic_update_irq_pending() interface Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 02/56] KVM: arm/arm64: vgic: avoid map in kvm_vgic_inject_mapped_irq() Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 03/56] KVM: arm/arm64: vgic: avoid map in kvm_vgic_map_is_active() Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 04/56] KVM: arm/arm64: vgic: avoid map in kvm_vgic_unmap_phys_irq() Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 05/56] KVM: arm/arm64: Remove the IRQ field from struct irq_phys_map Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 06/56] KVM: arm/arm64: arch_timer: Remove irq_phys_map Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 07/56] KVM: arm/arm64: vgic: Remove irq_phys_map from interface Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 08/56] KVM: arm/arm64: Get rid of vgic_cpu->nr_lr Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 09/56] KVM: arm/arm64: Fix MMIO emulation data handling Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 10/56] KVM: arm/arm64: Export mmio_read/write_bus Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 11/56] KVM: arm/arm64: pmu: abstract access to number of SPIs Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 12/56] KVM: arm/arm64: Provide functionality to pause and resume a guest Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 13/56] KVM: arm/arm64: move GICv2 emulation defines into arm-gic-v3.h Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:53 ` [PATCH v4 14/56] KVM: arm/arm64: vgic-new: Add data structure definitions Andre Przywara
2016-05-16 9:53 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 15/56] KVM: arm/arm64: vgic-new: Add acccessor to new struct vgic_irq instance Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 16/56] KVM: arm/arm64: vgic-new: Implement virtual IRQ injection Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 17/56] KVM: arm/arm64: vgic-new: Add IRQ sorting Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 18/56] KVM: arm/arm64: vgic-new: Add IRQ sync/flush framework Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 19/56] KVM: arm/arm64: vgic-new: Add GICv2 world switch backend Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 20/56] KVM: arm/arm64: vgic-new: Add GICv3 " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 21/56] KVM: arm/arm64: vgic-new: Implement kvm_vgic_vcpu_pending_irq Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 22/56] KVM: arm/arm64: vgic-new: Add MMIO handling framework Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 23/56] KVM: arm/arm64: vgic-new: Add GICv2 " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 24/56] KVM: arm/arm64: vgic-new: Add CTLR, TYPER and IIDR handlers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 25/56] KVM: arm/arm64: vgic-new: Add ENABLE registers handlers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 26/56] KVM: arm/arm64: vgic-new: Add PENDING " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 27/56] KVM: arm/arm64: vgic-new: Add ACTIVE " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 28/56] KVM: arm/arm64: vgic-new: Add PRIORITY " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 29/56] KVM: arm/arm64: vgic-new: Add CONFIG " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 30/56] KVM: arm/arm64: vgic-new: Add TARGET " Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 31/56] KVM: arm/arm64: vgic-new: Add SGIR register handler Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 32/56] KVM: arm/arm64: vgic-new: Add SGIPENDR register handlers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 33/56] KVM: arm/arm64: vgic-new: Add GICv3 MMIO handling framework Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 34/56] KVM: arm/arm64: vgic-new: Add GICv3 CTLR, IIDR, TYPER handlers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 35/56] KVM: arm/arm64: vgic-new: Add GICv3 redistributor IIDR and TYPER handler Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 36/56] KVM: arm/arm64: vgic-new: Add GICv3 IDREGS register handler Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 37/56] KVM: arm/arm64: vgic-new: Add GICv3 IROUTER register handlers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 38/56] KVM: arm/arm64: vgic-new: Add GICv3 SGI system register trap handler Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 39/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM device ops registration Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 40/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_NR_IRQS Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 41/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_CTRL Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 42/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: implement kvm_vgic_addr Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 43/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: KVM_DEV_ARM_VGIC_GRP_ADDR Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 44/56] KVM: arm/arm64: vgic-new: vgic_kvm_device: access to VGIC registers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 45/56] KVM: arm/arm64: vgic-new: Export register access interface Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 46/56] KVM: arm/arm64: vgic-new: Add userland access to VGIC dist registers Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 47/56] KVM: arm/arm64: vgic-new: Add GICH_VMCR accessors Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 48/56] KVM: arm/arm64: vgic-new: Add userland GIC CPU interface access Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 49/56] KVM: arm/arm64: vgic-new: vgic_init: implement kvm_vgic_hyp_init Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-17 15:50 ` Julien Grall
2016-05-17 15:50 ` Julien Grall
2016-05-16 9:54 ` [PATCH v4 50/56] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_create Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 51/56] KVM: arm/arm64: vgic-new: vgic_init: implement vgic_init Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 52/56] KVM: arm/arm64: vgic-new: vgic_init: implement map_resources Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 53/56] KVM: arm/arm64: vgic-new: Add vgic_v2/v3_enable Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 54/56] KVM: arm/arm64: vgic-new: Wire up irqfd injection Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 55/56] KVM: arm/arm64: vgic-new: implement mapped IRQ handling Andre Przywara
2016-05-16 9:54 ` Andre Przywara
2016-05-16 9:54 ` [PATCH v4 56/56] KVM: arm/arm64: vgic-new: enable build Andre Przywara
2016-05-16 9:54 ` Andre Przywara
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