From: Shunqian Zheng <zhengsq-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
To: Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org,
joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
Simon <xxm-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
Subject: Re: [PATCH 4/5] iommu/rockchip: add ARM64 cache flush operation for iommu
Date: Tue, 24 May 2016 10:31:17 +0800 [thread overview]
Message-ID: <5743BCF5.8030607@rock-chips.com> (raw)
In-Reply-To: <20160523133500.GF4892-M2fw3Uu6cmfZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
Catalin, Robin,
On 2016年05月23日 21:35, Catalin Marinas wrote:
> On Mon, May 23, 2016 at 11:44:14AM +0100, Robin Murphy wrote:
>> On 23/05/16 02:37, Shunqian Zheng wrote:
>>> From: Simon <xxm@rock-chips.com>
>>>
>>> Signed-off-by: Simon <xxm@rock-chips.com>
>>> ---
>>> drivers/iommu/rockchip-iommu.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
>>> index 043d18c..1741b65 100644
>>> --- a/drivers/iommu/rockchip-iommu.c
>>> +++ b/drivers/iommu/rockchip-iommu.c
>>> @@ -95,12 +95,16 @@ struct rk_iommu {
>>>
>>> static inline void rk_table_flush(u32 *va, unsigned int count)
>>> {
>>> +#if defined(CONFIG_ARM)
>>> phys_addr_t pa_start = virt_to_phys(va);
>>> phys_addr_t pa_end = virt_to_phys(va + count);
>>> size_t size = pa_end - pa_start;
>>>
>>> __cpuc_flush_dcache_area(va, size);
>>> outer_flush_range(pa_start, pa_end);
>>> +#elif defined(CONFIG_ARM64)
>>> + __dma_flush_range(va, va + count);
>>> +#endif
>> Ugh, please don't use arch-private cache maintenance functions directly from
>> a driver. Allocating/mapping page tables to be read by the IOMMU is still
>> DMA, so using the DMA APIs is the correct way to manage them, *especially*
>> if it needs to work across multiple architectures.
It's easier for us if changing the __dma_flush_range() to
__flush_dcache_area() is acceptable here?
Thank you,
- shunqian
> I fully agree, these functions should not be used in drivers.
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Shunqian Zheng <zhengsq@rock-chips.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Robin Murphy <robin.murphy@arm.com>
Cc: joro@8bytes.org, heiko@sntech.de,
Mark Rutland <mark.rutland@arm.com>,
linux-rockchip@lists.infradead.org,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
Simon <xxm@rock-chips.com>
Subject: Re: [PATCH 4/5] iommu/rockchip: add ARM64 cache flush operation for iommu
Date: Tue, 24 May 2016 10:31:17 +0800 [thread overview]
Message-ID: <5743BCF5.8030607@rock-chips.com> (raw)
In-Reply-To: <20160523133500.GF4892@e104818-lin.cambridge.arm.com>
Catalin, Robin,
On 2016年05月23日 21:35, Catalin Marinas wrote:
> On Mon, May 23, 2016 at 11:44:14AM +0100, Robin Murphy wrote:
>> On 23/05/16 02:37, Shunqian Zheng wrote:
>>> From: Simon <xxm@rock-chips.com>
>>>
>>> Signed-off-by: Simon <xxm@rock-chips.com>
>>> ---
>>> drivers/iommu/rockchip-iommu.c | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
>>> index 043d18c..1741b65 100644
>>> --- a/drivers/iommu/rockchip-iommu.c
>>> +++ b/drivers/iommu/rockchip-iommu.c
>>> @@ -95,12 +95,16 @@ struct rk_iommu {
>>>
>>> static inline void rk_table_flush(u32 *va, unsigned int count)
>>> {
>>> +#if defined(CONFIG_ARM)
>>> phys_addr_t pa_start = virt_to_phys(va);
>>> phys_addr_t pa_end = virt_to_phys(va + count);
>>> size_t size = pa_end - pa_start;
>>>
>>> __cpuc_flush_dcache_area(va, size);
>>> outer_flush_range(pa_start, pa_end);
>>> +#elif defined(CONFIG_ARM64)
>>> + __dma_flush_range(va, va + count);
>>> +#endif
>> Ugh, please don't use arch-private cache maintenance functions directly from
>> a driver. Allocating/mapping page tables to be read by the IOMMU is still
>> DMA, so using the DMA APIs is the correct way to manage them, *especially*
>> if it needs to work across multiple architectures.
It's easier for us if changing the __dma_flush_range() to
__flush_dcache_area() is acceptable here?
Thank you,
- shunqian
> I fully agree, these functions should not be used in drivers.
next prev parent reply other threads:[~2016-05-24 2:31 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-23 1:37 [PATCH 0/5] iommu/rockchip: fix bugs; enable iommu for ARM64 Shunqian Zheng
2016-05-23 1:37 ` Shunqian Zheng
[not found] ` <1463967439-13354-1-git-send-email-zhengsq-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-05-23 1:37 ` [PATCH 1/5] iommu/rockchip: fix devm_request_irq and devm_free_irq parameter Shunqian Zheng
2016-05-23 1:37 ` Shunqian Zheng
2016-05-23 9:28 ` Heiko Stuebner
2016-05-23 1:37 ` [PATCH 2/5] iommu/rockchip: add map_sg callback for rk_iommu_ops Shunqian Zheng
2016-05-23 1:37 ` Shunqian Zheng
2016-05-23 1:37 ` [PATCH 3/5] iommu/rockchip: add sanity check for virtual device Shunqian Zheng
2016-05-23 1:37 ` Shunqian Zheng
2016-05-23 1:37 ` [PATCH 4/5] iommu/rockchip: add ARM64 cache flush operation for iommu Shunqian Zheng
2016-05-23 1:37 ` Shunqian Zheng
[not found] ` <1463967439-13354-5-git-send-email-zhengsq-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-05-23 10:44 ` Robin Murphy
2016-05-23 10:44 ` Robin Murphy
[not found] ` <5742DEFE.1040902-5wv7dgnIgG8@public.gmane.org>
2016-05-23 13:35 ` Catalin Marinas
2016-05-23 13:35 ` Catalin Marinas
[not found] ` <20160523133500.GF4892-M2fw3Uu6cmfZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2016-05-24 2:31 ` Shunqian Zheng [this message]
2016-05-24 2:31 ` Shunqian Zheng
2016-05-24 9:59 ` Catalin Marinas
2016-05-23 1:37 ` [PATCH 5/5] iommu/rockchip: enable rockchip iommu on ARM64 platform Shunqian Zheng
2016-05-23 1:37 ` Shunqian Zheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5743BCF5.8030607@rock-chips.com \
--to=zhengsq-tnx95d0mmh7dzftrwevzcw@public.gmane.org \
--cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \
--cc=heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org \
--cc=iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org \
--cc=joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org \
--cc=linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \
--cc=robin.murphy-5wv7dgnIgG8@public.gmane.org \
--cc=xxm-TNX95d0MmH7DzftRWevZcw@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.