From: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Alexandre Courbot
<gnurou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Matthew Longnecker
<MLongnecker-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Jassi Brar
<jassisinghbrar-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
Subject: Re: [PATCH 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP
Date: Tue, 28 Jun 2016 17:16:03 +0800 [thread overview]
Message-ID: <57724053.6030902@nvidia.com> (raw)
In-Reply-To: <57714F7D.1040301-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
On 06/28/2016 12:08 AM, Stephen Warren wrote:
> On 06/27/2016 03:02 AM, Joseph Lo wrote:
>> The BPMP is a specific processor in Tegra chip, which is designed for
>> booting process handling and offloading the power management tasks
>> from the CPU. The binding document defines the resources that would be
>> used by the BPMP firmware driver, which can create the interprocessor
>> communication (IPC) between the CPU and BPMP.
>
>> diff --git
>> a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>
>> +The BPMP is a specific processor in Tegra chip, which is designed for
>> +booting process handling and offloading the power management tasks from
>> +the CPU. The binding document defines the resources that would be
>> used by
>> +the BPMP firmware driver, which can create the interprocessor
>> +communication (IPC) between the CPU and BPMP.
>
> s/power management/power management, clock management, and reset control/?
Yes.
>
>> +Required properties:
>> +- name : Should be bpmp
>> +- compatible : Should be "nvidia,tegra<chip>-bpmp"
>
> Again, I'd suggest wording this as:
>
> - compatible
> Array of strings.
> One of:
> - "nvidia,tegra186-bpmp"
Okay.
>
>> +- mboxes : The phandle of mailbox controller and the channel ID
>
> s/channel ID/mailbox specifier/.
>
>> + See "Documentation/devicetree/bindings/mailbox/
>> + nvidia,tegra186-hsp.txt" and "Documentation/devicetree/
>> + bindings/mailbox/mailbox.txt" for more details about the generic
>> + mailbox controller and mailbox client driver bindings.
>
> I'd rather not split the filenames across lines, since that makes grep
> fail to match. Perhaps add the following text to the introductory
> section at the start of the file to avoid having to mention some of the
> filenames in an indented block of text:
Thanks.
>
> ==========
> This node is a mailbox consumer. See the following file for details of
> the mailbox subsystem, and the specifiers implemented by the relevant
> provider(s):
>
> - Documentation/devicetree/bindings/mailbox/mailbox.txt
> - Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
>
> This node is a clock and reset provider. See the following files for
> general documentation of those features, and the specifiers implemented
> by this node:
>
> - Documentation/devicetree/bindings/clock/clock-bindings.txt
> - include/dt-bindings/clock/tegra186-clock.h
> - Documentation/devicetree/bindings/reset/reset.txt
> - include/dt-bindings/reset/tegra186-reset.h
> ==========
>
> Related, I would expect those two header files (tegra186-clock.h and
> tegra186-reset.h) to be part of this patch, since they form part of the
> definition of this binding.
Okay. Will add them.
>
>> +The shared memory bindings for BPMP
>> +-----------------------------------
>> +
>> +The shared memory area for the IPC TX and RX between CPU and BPMP are
>> +predefined and work on top of sysram, which is a sram inside the chip.
>
> s/a sram/an SRAM/.
>
>> +Example:
> ...
>> +bpmp@d0000000 {
>
> There should be no unit address ("@d0000000") in the node name, since
> there's no reg property.
Thanks,
-Joseph
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WARNING: multiple messages have this Message-ID (diff)
From: josephl@nvidia.com (Joseph Lo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP
Date: Tue, 28 Jun 2016 17:16:03 +0800 [thread overview]
Message-ID: <57724053.6030902@nvidia.com> (raw)
In-Reply-To: <57714F7D.1040301@wwwdotorg.org>
On 06/28/2016 12:08 AM, Stephen Warren wrote:
> On 06/27/2016 03:02 AM, Joseph Lo wrote:
>> The BPMP is a specific processor in Tegra chip, which is designed for
>> booting process handling and offloading the power management tasks
>> from the CPU. The binding document defines the resources that would be
>> used by the BPMP firmware driver, which can create the interprocessor
>> communication (IPC) between the CPU and BPMP.
>
>> diff --git
>> a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>
>> +The BPMP is a specific processor in Tegra chip, which is designed for
>> +booting process handling and offloading the power management tasks from
>> +the CPU. The binding document defines the resources that would be
>> used by
>> +the BPMP firmware driver, which can create the interprocessor
>> +communication (IPC) between the CPU and BPMP.
>
> s/power management/power management, clock management, and reset control/?
Yes.
>
>> +Required properties:
>> +- name : Should be bpmp
>> +- compatible : Should be "nvidia,tegra<chip>-bpmp"
>
> Again, I'd suggest wording this as:
>
> - compatible
> Array of strings.
> One of:
> - "nvidia,tegra186-bpmp"
Okay.
>
>> +- mboxes : The phandle of mailbox controller and the channel ID
>
> s/channel ID/mailbox specifier/.
>
>> + See "Documentation/devicetree/bindings/mailbox/
>> + nvidia,tegra186-hsp.txt" and "Documentation/devicetree/
>> + bindings/mailbox/mailbox.txt" for more details about the generic
>> + mailbox controller and mailbox client driver bindings.
>
> I'd rather not split the filenames across lines, since that makes grep
> fail to match. Perhaps add the following text to the introductory
> section at the start of the file to avoid having to mention some of the
> filenames in an indented block of text:
Thanks.
>
> ==========
> This node is a mailbox consumer. See the following file for details of
> the mailbox subsystem, and the specifiers implemented by the relevant
> provider(s):
>
> - Documentation/devicetree/bindings/mailbox/mailbox.txt
> - Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
>
> This node is a clock and reset provider. See the following files for
> general documentation of those features, and the specifiers implemented
> by this node:
>
> - Documentation/devicetree/bindings/clock/clock-bindings.txt
> - include/dt-bindings/clock/tegra186-clock.h
> - Documentation/devicetree/bindings/reset/reset.txt
> - include/dt-bindings/reset/tegra186-reset.h
> ==========
>
> Related, I would expect those two header files (tegra186-clock.h and
> tegra186-reset.h) to be part of this patch, since they form part of the
> definition of this binding.
Okay. Will add them.
>
>> +The shared memory bindings for BPMP
>> +-----------------------------------
>> +
>> +The shared memory area for the IPC TX and RX between CPU and BPMP are
>> +predefined and work on top of sysram, which is a sram inside the chip.
>
> s/a sram/an SRAM/.
>
>> +Example:
> ...
>> +bpmp at d0000000 {
>
> There should be no unit address ("@d0000000") in the node name, since
> there's no reg property.
Thanks,
-Joseph
WARNING: multiple messages have this Message-ID (diff)
From: Joseph Lo <josephl@nvidia.com>
To: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>,
<linux-tegra@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Matthew Longnecker <MLongnecker@nvidia.com>,
<devicetree@vger.kernel.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
<linux-kernel@vger.kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Subject: Re: [PATCH 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP
Date: Tue, 28 Jun 2016 17:16:03 +0800 [thread overview]
Message-ID: <57724053.6030902@nvidia.com> (raw)
In-Reply-To: <57714F7D.1040301@wwwdotorg.org>
On 06/28/2016 12:08 AM, Stephen Warren wrote:
> On 06/27/2016 03:02 AM, Joseph Lo wrote:
>> The BPMP is a specific processor in Tegra chip, which is designed for
>> booting process handling and offloading the power management tasks
>> from the CPU. The binding document defines the resources that would be
>> used by the BPMP firmware driver, which can create the interprocessor
>> communication (IPC) between the CPU and BPMP.
>
>> diff --git
>> a/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>> b/Documentation/devicetree/bindings/firmware/nvidia,tegra186-bpmp.txt
>
>> +The BPMP is a specific processor in Tegra chip, which is designed for
>> +booting process handling and offloading the power management tasks from
>> +the CPU. The binding document defines the resources that would be
>> used by
>> +the BPMP firmware driver, which can create the interprocessor
>> +communication (IPC) between the CPU and BPMP.
>
> s/power management/power management, clock management, and reset control/?
Yes.
>
>> +Required properties:
>> +- name : Should be bpmp
>> +- compatible : Should be "nvidia,tegra<chip>-bpmp"
>
> Again, I'd suggest wording this as:
>
> - compatible
> Array of strings.
> One of:
> - "nvidia,tegra186-bpmp"
Okay.
>
>> +- mboxes : The phandle of mailbox controller and the channel ID
>
> s/channel ID/mailbox specifier/.
>
>> + See "Documentation/devicetree/bindings/mailbox/
>> + nvidia,tegra186-hsp.txt" and "Documentation/devicetree/
>> + bindings/mailbox/mailbox.txt" for more details about the generic
>> + mailbox controller and mailbox client driver bindings.
>
> I'd rather not split the filenames across lines, since that makes grep
> fail to match. Perhaps add the following text to the introductory
> section at the start of the file to avoid having to mention some of the
> filenames in an indented block of text:
Thanks.
>
> ==========
> This node is a mailbox consumer. See the following file for details of
> the mailbox subsystem, and the specifiers implemented by the relevant
> provider(s):
>
> - Documentation/devicetree/bindings/mailbox/mailbox.txt
> - Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
>
> This node is a clock and reset provider. See the following files for
> general documentation of those features, and the specifiers implemented
> by this node:
>
> - Documentation/devicetree/bindings/clock/clock-bindings.txt
> - include/dt-bindings/clock/tegra186-clock.h
> - Documentation/devicetree/bindings/reset/reset.txt
> - include/dt-bindings/reset/tegra186-reset.h
> ==========
>
> Related, I would expect those two header files (tegra186-clock.h and
> tegra186-reset.h) to be part of this patch, since they form part of the
> definition of this binding.
Okay. Will add them.
>
>> +The shared memory bindings for BPMP
>> +-----------------------------------
>> +
>> +The shared memory area for the IPC TX and RX between CPU and BPMP are
>> +predefined and work on top of sysram, which is a sram inside the chip.
>
> s/a sram/an SRAM/.
>
>> +Example:
> ...
>> +bpmp@d0000000 {
>
> There should be no unit address ("@d0000000") in the node name, since
> there's no reg property.
Thanks,
-Joseph
next prev parent reply other threads:[~2016-06-28 9:16 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-27 9:02 [PATCH 00/10] arm64: tegra: add BPMP support Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 01/10] Documentation: dt-bindings: mailbox: tegra: Add binding for HSP mailbox Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
[not found] ` <20160627090248.23621-2-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-27 15:55 ` Stephen Warren
2016-06-27 15:55 ` Stephen Warren
2016-06-27 15:55 ` Stephen Warren
[not found] ` <57714C85.50802-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-06-28 9:15 ` Joseph Lo
2016-06-28 9:15 ` Joseph Lo
2016-06-28 9:15 ` Joseph Lo
[not found] ` <57724039.7080007-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-28 19:08 ` Stephen Warren
2016-06-28 19:08 ` Stephen Warren
2016-06-28 19:08 ` Stephen Warren
2016-06-29 5:56 ` Joseph Lo
2016-06-29 5:56 ` Joseph Lo
2016-06-29 5:56 ` Joseph Lo
2016-06-29 15:28 ` Stephen Warren
2016-06-29 15:28 ` Stephen Warren
2016-06-29 15:28 ` Stephen Warren
2016-06-30 9:25 ` Joseph Lo
2016-06-30 9:25 ` Joseph Lo
2016-06-30 9:25 ` Joseph Lo
[not found] ` <5774E599.4000204-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-30 16:02 ` Stephen Warren
2016-06-30 16:02 ` Stephen Warren
2016-06-30 16:02 ` Stephen Warren
[not found] ` <5775427B.9040907-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-07-01 2:23 ` Joseph Lo
2016-07-01 2:23 ` Joseph Lo
2016-07-01 2:23 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 02/10] mailbox: tegra-hsp: Add HSP(Hardware Synchronization Primitives) driver Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
[not found] ` <20160627090248.23621-4-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-27 16:08 ` Stephen Warren
2016-06-27 16:08 ` Stephen Warren
2016-06-27 16:08 ` Stephen Warren
[not found] ` <57714F7D.1040301-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2016-06-28 9:16 ` Joseph Lo [this message]
2016-06-28 9:16 ` Joseph Lo
2016-06-28 9:16 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 04/10] firmware: tegra: add IVC library Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 05/10] firmware: tegra: add BPMP support Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 06/10] soc/tegra: Add Tegra186 support Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 09/10] arm64: dts: tegra: Add NVIDIA Tegra186 P3310 main board support Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
[not found] ` <20160627090248.23621-1-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-27 9:02 ` [PATCH 07/10] arm64: defconfig: Enable Tegra186 SoC Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 08/10] arm64: dts: tegra: Add Tegra186 support Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` [PATCH 10/10] arm64: dts: tegra: Add NVIDIA P2771 board support Joseph Lo
2016-06-27 9:02 ` Joseph Lo
2016-06-27 9:02 ` Joseph Lo
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