From: Dave Hansen <dave@sr71.net>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
x86@kernel.org, linux-mm@kvack.org,
torvalds@linux-foundation.org, akpm@linux-foundation.org,
bp@alien8.de, ak@linux.intel.com, mhocko@suse.com,
dave.hansen@linux.intel.com
Subject: Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs
Date: Thu, 30 Jun 2016 18:54:59 -0700 [thread overview]
Message-ID: <5775CD73.2070809@sr71.net> (raw)
In-Reply-To: <5A585093-4E0D-49BC-A9CA-0072BB83A71C@gmail.com>
On 06/30/2016 06:50 PM, Nadav Amit wrote:
> Dave Hansen <dave@sr71.net> wrote:
>> +pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address,
>> + pte_t *ptep)
>> +{
>> + struct mm_struct *mm = vma->vm_mm;
>> + pte_t pte;
>> +
>> + pte = ptep_get_and_clear(mm, address, ptep);
>> + if (pte_accessible(mm, pte)) {
>> + flush_tlb_page(vma, address);
>> + /*
>> + * Ensure that the compiler orders our set_pte()
>> + * after the flush_tlb_page() no matter what.
>> + */
>> + barrier();
>
> I dona??t think such a barrier (after remote TLB flush) is needed.
> Eventually, if a remote flush takes place, you get csd_lock_wait() to be
> called, and then smp_rmb() is called (which is essentially a barrier()
> call on x86).
Andi really wanted to make sure this got in here. He said there was a
bug that bit him really badly once where a function got reordered.
Granted, a call _should_ be sufficient to keep the compiler from
reordering things, but this makes double sure.
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WARNING: multiple messages have this Message-ID (diff)
From: Dave Hansen <dave@sr71.net>
To: Nadav Amit <nadav.amit@gmail.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
x86@kernel.org, linux-mm@kvack.org,
torvalds@linux-foundation.org, akpm@linux-foundation.org,
bp@alien8.de, ak@linux.intel.com, mhocko@suse.com,
dave.hansen@linux.intel.com
Subject: Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs
Date: Thu, 30 Jun 2016 18:54:59 -0700 [thread overview]
Message-ID: <5775CD73.2070809@sr71.net> (raw)
In-Reply-To: <5A585093-4E0D-49BC-A9CA-0072BB83A71C@gmail.com>
On 06/30/2016 06:50 PM, Nadav Amit wrote:
> Dave Hansen <dave@sr71.net> wrote:
>> +pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address,
>> + pte_t *ptep)
>> +{
>> + struct mm_struct *mm = vma->vm_mm;
>> + pte_t pte;
>> +
>> + pte = ptep_get_and_clear(mm, address, ptep);
>> + if (pte_accessible(mm, pte)) {
>> + flush_tlb_page(vma, address);
>> + /*
>> + * Ensure that the compiler orders our set_pte()
>> + * after the flush_tlb_page() no matter what.
>> + */
>> + barrier();
>
> I don’t think such a barrier (after remote TLB flush) is needed.
> Eventually, if a remote flush takes place, you get csd_lock_wait() to be
> called, and then smp_rmb() is called (which is essentially a barrier()
> call on x86).
Andi really wanted to make sure this got in here. He said there was a
bug that bit him really badly once where a function got reordered.
Granted, a call _should_ be sufficient to keep the compiler from
reordering things, but this makes double sure.
next prev parent reply other threads:[~2016-07-01 1:55 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 0:12 [PATCH 0/6] [v3] Workaround for Xeon Phi PTE A/D bits erratum Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 1/6] x86: fix duplicated X86_BUG(9) macro Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 9:23 ` Borislav Petkov
2016-07-01 16:30 ` Andy Lutomirski
2016-07-01 16:30 ` Andy Lutomirski
2016-07-01 16:46 ` Borislav Petkov
2016-07-03 14:36 ` Andy Lutomirski
2016-07-03 14:36 ` Andy Lutomirski
2016-07-03 18:44 ` Borislav Petkov
2016-07-01 0:12 ` [PATCH 2/6] mm, tlb: add mmu_gather->saw_unset_a_or_d Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 3/6] mm: add force_batch_flush to mmu_gather Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 4/6] mm: move flush in madvise_free_pte_range() Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 5/6] mm: make tlb_flush_mmu_tlbonly() return whether it flushed Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 1:50 ` Nadav Amit
2016-07-01 1:50 ` Nadav Amit
2016-07-01 1:54 ` Dave Hansen [this message]
2016-07-01 1:54 ` Dave Hansen
2016-07-01 2:55 ` Linus Torvalds
2016-07-01 2:55 ` Linus Torvalds
2016-07-01 3:06 ` Brian Gerst
2016-07-01 3:06 ` Brian Gerst
2016-07-01 3:21 ` Linus Torvalds
2016-07-03 17:10 ` Dave Hansen
2016-07-03 17:10 ` Dave Hansen
2016-07-01 4:39 ` Dave Hansen
2016-07-01 4:39 ` Dave Hansen
2016-07-01 5:43 ` Linus Torvalds
2016-07-01 5:43 ` Linus Torvalds
2016-07-01 14:25 ` Eric W. Biederman
2016-07-01 14:25 ` Eric W. Biederman
2016-07-01 15:51 ` Dave Hansen
2016-07-01 15:51 ` Dave Hansen
2016-07-01 18:12 ` Eric W. Biederman
2016-07-01 18:12 ` Eric W. Biederman
2016-07-01 16:07 ` Linus Torvalds
2016-07-01 16:07 ` Linus Torvalds
2016-07-01 16:14 ` Dave Hansen
2016-07-01 16:14 ` Dave Hansen
2016-07-01 16:25 ` Linus Torvalds
2016-07-01 16:25 ` Linus Torvalds
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