From: Dave Hansen <dave@sr71.net>
To: Brian Gerst <brgerst@gmail.com>,
Linus Torvalds <torvalds@linux-foundation.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
linux-mm <linux-mm@kvack.org>,
Andrew Morton <akpm@linux-foundation.org>,
Borislav Petkov <bp@alien8.de>, Andi Kleen <ak@linux.intel.com>,
Michal Hocko <mhocko@suse.com>,
Dave Hansen <dave.hansen@linux.intel.com>
Subject: Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs
Date: Sun, 3 Jul 2016 10:10:39 -0700 [thread overview]
Message-ID: <5779470F.8020205@sr71.net> (raw)
In-Reply-To: <CAMzpN2iLBKF7vK3TuTPwYn2nZOw2q_Pn=q+g6pNuVs0k6Xd5LQ@mail.gmail.com>
On 06/30/2016 08:06 PM, Brian Gerst wrote:
>> > It's not like anybody will ever care about 32-bit page tables on
>> > Knights Landing anyway.
> Could this affect a 32-bit guest VM?
This isn't about 32-bit *mode*. It's about using the the 32-bit 2-level
_paging_ mode that supports only 4GB virtual and 4GB physical addresses.
That mode also doesn't support the No-eXecute (NX) bit, which basically
everyone needs today for its security benefits.
Even the little Quark CPU supports PAE (64-bit page tables).
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WARNING: multiple messages have this Message-ID (diff)
From: Dave Hansen <dave@sr71.net>
To: Brian Gerst <brgerst@gmail.com>,
Linus Torvalds <torvalds@linux-foundation.org>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
linux-mm <linux-mm@kvack.org>,
Andrew Morton <akpm@linux-foundation.org>,
Borislav Petkov <bp@alien8.de>, Andi Kleen <ak@linux.intel.com>,
Michal Hocko <mhocko@suse.com>,
Dave Hansen <dave.hansen@linux.intel.com>
Subject: Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs
Date: Sun, 3 Jul 2016 10:10:39 -0700 [thread overview]
Message-ID: <5779470F.8020205@sr71.net> (raw)
In-Reply-To: <CAMzpN2iLBKF7vK3TuTPwYn2nZOw2q_Pn=q+g6pNuVs0k6Xd5LQ@mail.gmail.com>
On 06/30/2016 08:06 PM, Brian Gerst wrote:
>> > It's not like anybody will ever care about 32-bit page tables on
>> > Knights Landing anyway.
> Could this affect a 32-bit guest VM?
This isn't about 32-bit *mode*. It's about using the the 32-bit 2-level
_paging_ mode that supports only 4GB virtual and 4GB physical addresses.
That mode also doesn't support the No-eXecute (NX) bit, which basically
everyone needs today for its security benefits.
Even the little Quark CPU supports PAE (64-bit page tables).
next prev parent reply other threads:[~2016-07-03 17:10 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 0:12 [PATCH 0/6] [v3] Workaround for Xeon Phi PTE A/D bits erratum Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 1/6] x86: fix duplicated X86_BUG(9) macro Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 9:23 ` Borislav Petkov
2016-07-01 16:30 ` Andy Lutomirski
2016-07-01 16:30 ` Andy Lutomirski
2016-07-01 16:46 ` Borislav Petkov
2016-07-03 14:36 ` Andy Lutomirski
2016-07-03 14:36 ` Andy Lutomirski
2016-07-03 18:44 ` Borislav Petkov
2016-07-01 0:12 ` [PATCH 2/6] mm, tlb: add mmu_gather->saw_unset_a_or_d Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 3/6] mm: add force_batch_flush to mmu_gather Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 4/6] mm: move flush in madvise_free_pte_range() Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 5/6] mm: make tlb_flush_mmu_tlbonly() return whether it flushed Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 0:12 ` [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs Dave Hansen
2016-07-01 0:12 ` Dave Hansen
2016-07-01 1:50 ` Nadav Amit
2016-07-01 1:50 ` Nadav Amit
2016-07-01 1:54 ` Dave Hansen
2016-07-01 1:54 ` Dave Hansen
2016-07-01 2:55 ` Linus Torvalds
2016-07-01 2:55 ` Linus Torvalds
2016-07-01 3:06 ` Brian Gerst
2016-07-01 3:06 ` Brian Gerst
2016-07-01 3:21 ` Linus Torvalds
2016-07-03 17:10 ` Dave Hansen [this message]
2016-07-03 17:10 ` Dave Hansen
2016-07-01 4:39 ` Dave Hansen
2016-07-01 4:39 ` Dave Hansen
2016-07-01 5:43 ` Linus Torvalds
2016-07-01 5:43 ` Linus Torvalds
2016-07-01 14:25 ` Eric W. Biederman
2016-07-01 14:25 ` Eric W. Biederman
2016-07-01 15:51 ` Dave Hansen
2016-07-01 15:51 ` Dave Hansen
2016-07-01 18:12 ` Eric W. Biederman
2016-07-01 18:12 ` Eric W. Biederman
2016-07-01 16:07 ` Linus Torvalds
2016-07-01 16:07 ` Linus Torvalds
2016-07-01 16:14 ` Dave Hansen
2016-07-01 16:14 ` Dave Hansen
2016-07-01 16:25 ` Linus Torvalds
2016-07-01 16:25 ` Linus Torvalds
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