drm/bridge: dw_hdmi: Colorspace registers

drm/bridge: dw_hdmi: Colorspace registers

[Jose Abreu]

Hi Russell,

When using driver dw-hdmi in any other colorspace than RGB the
Y1, Y0 and YCC values are not correct. I confirmed in databook
that these registers are being written to the wrong offset (per
my databook they should be written in bits 0:1 and 7 instead of
bits 4:5). The piece of code in question is this:

    val = (frame.colorspace & 3) << 4 | (frame.scan_mode & 0x3);

So colorspace is being written to bits 4 and 5 instead of bits 0,
1 and 7.

Can you confirm if this is specific to Synopsys Phy?

Please notice that by default the colorspace is fixed to RGB
(where Y1, Y0 and YCC are zero) so this is only reproducible when
trying to use a different colorspace.

Best regards,
Jose Miguel Abreu
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Re: drm/bridge: dw_hdmi: Colorspace registers

[Russell King - ARM Linux]

On Wed, Aug 17, 2016 at 10:33:10AM +0100, Jose Abreu wrote:
> Hi Russell,
> 
> When using driver dw-hdmi in any other colorspace than RGB the
> Y1, Y0 and YCC values are not correct. I confirmed in databook
> that these registers are being written to the wrong offset (per
> my databook they should be written in bits 0:1 and 7 instead of
> bits 4:5). The piece of code in question is this:
> 
>     val = (frame.colorspace & 3) << 4 | (frame.scan_mode & 0x3);
> 
> So colorspace is being written to bits 4 and 5 instead of bits 0,
> 1 and 7.

You're half-right.  The above should be:

	val = (frame.colorspace & 3) | (frame.scan_mode & 3) << 4;

I'm not sure why you're saying about bit 7 - this is labelled in the
iMX6 manuals as "FC_AVICONF0_MISC" and "Frame composer AVI packet
configuration bit" which is not a very useful description.  So I'm
not sure that bit 7 is part of the colorspace configuration.

Unfortunately, all I have to go on is what's reproduced in the iMX6
TRMs as I have no access to the Synopsis databooks.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
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Re: drm/bridge: dw_hdmi: Colorspace registers

[Jose Abreu]

Hi Russell,


On 17-08-2016 12:21, Russell King - ARM Linux wrote:
> On Wed, Aug 17, 2016 at 10:33:10AM +0100, Jose Abreu wrote:
>> Hi Russell,
>>
>> When using driver dw-hdmi in any other colorspace than RGB the
>> Y1, Y0 and YCC values are not correct. I confirmed in databook
>> that these registers are being written to the wrong offset (per
>> my databook they should be written in bits 0:1 and 7 instead of
>> bits 4:5). The piece of code in question is this:
>>
>>     val = (frame.colorspace & 3) << 4 | (frame.scan_mode & 0x3);
>>
>> So colorspace is being written to bits 4 and 5 instead of bits 0,
>> 1 and 7.
> You're half-right.  The above should be:
>
> 	val = (frame.colorspace & 3) | (frame.scan_mode & 3) << 4;
>
> I'm not sure why you're saying about bit 7 - this is labelled in the
> iMX6 manuals as "FC_AVICONF0_MISC" and "Frame composer AVI packet
> configuration bit" which is not a very useful description.  So I'm
> not sure that bit 7 is part of the colorspace configuration.

This is bit Y2 of rgb_ycc_indication but I am reading CEA-861-F
and this bit is reserved so it shouldn't matter. I will send a
patch to correct this.

>
> Unfortunately, all I have to go on is what's reproduced in the iMX6
> TRMs as I have no access to the Synopsis databooks.
>

Best regards,
Jose Miguel Abreu
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Re: drm/bridge: dw_hdmi: Colorspace registers

[Russell King - ARM Linux]

On Wed, Aug 17, 2016 at 12:37:27PM +0100, Jose Abreu wrote:
> Hi Russell,
> 
> 
> On 17-08-2016 12:21, Russell King - ARM Linux wrote:
> > On Wed, Aug 17, 2016 at 10:33:10AM +0100, Jose Abreu wrote:
> >> Hi Russell,
> >>
> >> When using driver dw-hdmi in any other colorspace than RGB the
> >> Y1, Y0 and YCC values are not correct. I confirmed in databook
> >> that these registers are being written to the wrong offset (per
> >> my databook they should be written in bits 0:1 and 7 instead of
> >> bits 4:5). The piece of code in question is this:
> >>
> >>     val = (frame.colorspace & 3) << 4 | (frame.scan_mode & 0x3);
> >>
> >> So colorspace is being written to bits 4 and 5 instead of bits 0,
> >> 1 and 7.
> > You're half-right.  The above should be:
> >
> > 	val = (frame.colorspace & 3) | (frame.scan_mode & 3) << 4;
> >
> > I'm not sure why you're saying about bit 7 - this is labelled in the
> > iMX6 manuals as "FC_AVICONF0_MISC" and "Frame composer AVI packet
> > configuration bit" which is not a very useful description.  So I'm
> > not sure that bit 7 is part of the colorspace configuration.
> 
> This is bit Y2 of rgb_ycc_indication but I am reading CEA-861-F
> and this bit is reserved so it shouldn't matter. I will send a
> patch to correct this.

The register values do not always correspond with the CEA defined
bytes.  If they did, we could use the standard functions to assemble
the infoframe.

The infoframe has:

7   - Reserved
6:5 - Y1:0 - colorimetry
4   - A0   - active aspect present
3:2 - B1:0 - bar info
1:0 - S1:0 - scan info

Whereas, AVICONF0 has:

7   - Misc
6   - Active aspect present
5:4 - Scan info
3:2 - bar info
1:0 - RGB/YCC

So you can't imply anything whatsoever from the CEA specs about the
meaning of confusingly documented bits in this register.

-- 
RMK's Patch system: http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
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