From: "zhichang.yuan" <yuanzhichang@hisilicon.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: <catalin.marinas@arm.com>, <will.deacon@arm.com>,
<robh+dt@kernel.org>, <bhelgaas@google.com>, <olof@lixom.net>,
<arnd@arndb.de>, <linux-arm-kernel@lists.infradead.org>,
<lorenzo.pieralisi@arm.com>, <linux-kernel@vger.kernel.org>,
<linuxarm@huawei.com>, <devicetree@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <linux-serial@vger.kernel.org>,
<minyard@acm.org>, <liviu.dudau@arm.com>, <zourongrong@gmail.com>,
<john.garry@huawei.com>, <gabriele.paoloni@huawei.com>,
<zhichang.yuan02@gmail.com>, <kantyzc@163.com>,
<xuwei5@hisilicon.com>, <marc.zyngier@arm.com>
Subject: Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced
Date: Thu, 10 Nov 2016 16:33:10 +0800 [thread overview]
Message-ID: <582430C6.60307@hisilicon.com> (raw)
In-Reply-To: <1478647002.7430.69.camel@kernel.crashing.org>
Hi, Ben,
On 2016/11/9 7:16, Benjamin Herrenschmidt wrote:
> On Tue, 2016-11-08 at 12:03 +0000, Mark Rutland wrote:
>> On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote:
>>>
>>> For arm64, there is no I/O space as other architectural platforms, such as
>>> X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs,
>>> such as Hip06, when accessing some legacy ISA devices connected to LPC, those
>>> known port addresses are used to control the corresponding target devices, for
>>> example, 0x2f8 is for UART, 0xe4 is for ipmi-bt. It is different from the
>>> normal MMIO mode in using.
>>
>> This has nothing to do with arm64. Hardware with this kind of indirect
>> bus access could be integrated with a variety of CPU architectures. It
>> simply hasn't been, yet.
>
> On some ppc's we also use similar indirect access methods for IOs. We
> have a generic infrastructure for re-routing some memory or IO regions
> to hooks.
>
I am interested on the generic infrastructure on PPC.
Could you point out where those drivers are?
want to take a look..
Thanks,
Zhichang
> On POWER8, our PCIe doesn't do IO at all, but we have an LPC bus behind
> firmware calls ;-) We use that infrastructure to plumb in the LPC bus.
>
>>> To drive these devices, this patch introduces a method named indirect-IO.
>>> In this method the in/out pair in arch/arm64/include/asm/io.h will be
>>> redefined. When upper layer drivers call in/out with those known legacy port
>>> addresses to access the peripherals, the hooking functions corrresponding to
>>> those target peripherals will be called. Through this way, those upper layer
>>> drivers which depend on in/out can run on Hip06 without any changes.
>>
>> As above, this has nothing to do with arm64, and as such, should live in
>> generic code, exactly as we would do if we had higher-level ISA
>> accessor ops.
>>
>> Regardless, given the multi-instance case, I don't think this is
>> sufficient in general (and I think we need higher-level ISA accessors
>> to handle the indirection).
>
> Multi-instance with IO is tricky to do generically because archs already
> have all sort of hacks to deal with the fact that inb/outb don't require
> an explicit ioremap, so an IO resource can take all sort of shape depending
> on the arch.
>
> Overall it boils down to applying some kind of per-instance "offset" to
> the IO port number though.
>
WARNING: multiple messages have this Message-ID (diff)
From: "zhichang.yuan" <yuanzhichang@hisilicon.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: catalin.marinas@arm.com, will.deacon@arm.com, robh+dt@kernel.org,
bhelgaas@google.com, olof@lixom.net, arnd@arndb.de,
linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com,
linux-kernel@vger.kernel.org, linuxarm@huawei.com,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, minyard@acm.org,
liviu.dudau@arm.com, zourongrong@gmail.com,
john.garry@huawei.com, gabriele.paoloni@huawei.com,
zhichang.yuan02@gmail.com, kantyzc@163.com, xuwei5@hisilicon.com,
marc.zyngier@arm.com
Subject: Re: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced
Date: Thu, 10 Nov 2016 16:33:10 +0800 [thread overview]
Message-ID: <582430C6.60307@hisilicon.com> (raw)
In-Reply-To: <1478647002.7430.69.camel@kernel.crashing.org>
Hi, Ben,
On 2016/11/9 7:16, Benjamin Herrenschmidt wrote:
> On Tue, 2016-11-08 at 12:03 +0000, Mark Rutland wrote:
>> On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote:
>>>
>>> For arm64, there is no I/O space as other architectural platforms, such as
>>> X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs,
>>> such as Hip06, when accessing some legacy ISA devices connected to LPC, those
>>> known port addresses are used to control the corresponding target devices, for
>>> example, 0x2f8 is for UART, 0xe4 is for ipmi-bt. It is different from the
>>> normal MMIO mode in using.
>>
>> This has nothing to do with arm64. Hardware with this kind of indirect
>> bus access could be integrated with a variety of CPU architectures. It
>> simply hasn't been, yet.
>
> On some ppc's we also use similar indirect access methods for IOs. We
> have a generic infrastructure for re-routing some memory or IO regions
> to hooks.
>
I am interested on the generic infrastructure on PPC.
Could you point out where those drivers are?
want to take a look..
Thanks,
Zhichang
> On POWER8, our PCIe doesn't do IO at all, but we have an LPC bus behind
> firmware calls ;-) We use that infrastructure to plumb in the LPC bus.
>
>>> To drive these devices, this patch introduces a method named indirect-IO.
>>> In this method the in/out pair in arch/arm64/include/asm/io.h will be
>>> redefined. When upper layer drivers call in/out with those known legacy port
>>> addresses to access the peripherals, the hooking functions corrresponding to
>>> those target peripherals will be called. Through this way, those upper layer
>>> drivers which depend on in/out can run on Hip06 without any changes.
>>
>> As above, this has nothing to do with arm64, and as such, should live in
>> generic code, exactly as we would do if we had higher-level ISA
>> accessor ops.
>>
>> Regardless, given the multi-instance case, I don't think this is
>> sufficient in general (and I think we need higher-level ISA accessors
>> to handle the indirection).
>
> Multi-instance with IO is tricky to do generically because archs already
> have all sort of hacks to deal with the fact that inb/outb don't require
> an explicit ioremap, so an IO resource can take all sort of shape depending
> on the arch.
>
> Overall it boils down to applying some kind of per-instance "offset" to
> the IO port number though.
>
WARNING: multiple messages have this Message-ID (diff)
From: yuanzhichang@hisilicon.com (zhichang.yuan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced
Date: Thu, 10 Nov 2016 16:33:10 +0800 [thread overview]
Message-ID: <582430C6.60307@hisilicon.com> (raw)
In-Reply-To: <1478647002.7430.69.camel@kernel.crashing.org>
Hi, Ben,
On 2016/11/9 7:16, Benjamin Herrenschmidt wrote:
> On Tue, 2016-11-08 at 12:03 +0000, Mark Rutland wrote:
>> On Tue, Nov 08, 2016 at 11:47:07AM +0800, zhichang.yuan wrote:
>>>
>>> For arm64, there is no I/O space as other architectural platforms, such as
>>> X86. Most I/O accesses are achieved based on MMIO. But for some arm64 SoCs,
>>> such as Hip06, when accessing some legacy ISA devices connected to LPC, those
>>> known port addresses are used to control the corresponding target devices, for
>>> example, 0x2f8 is for UART, 0xe4 is for ipmi-bt. It is different from the
>>> normal MMIO mode in using.
>>
>> This has nothing to do with arm64. Hardware with this kind of indirect
>> bus access could be integrated with a variety of CPU architectures. It
>> simply hasn't been, yet.
>
> On some ppc's we also use similar indirect access methods for IOs. We
> have a generic infrastructure for re-routing some memory or IO regions
> to hooks.
>
I am interested on the generic infrastructure on PPC.
Could you point out where those drivers are?
want to take a look..
Thanks,
Zhichang
> On POWER8, our PCIe doesn't do IO at all, but we have an LPC bus behind
> firmware calls ;-) We use that infrastructure to plumb in the LPC bus.
>
>>> To drive these devices, this patch introduces a method named indirect-IO.
>>> In this method the in/out pair in arch/arm64/include/asm/io.h will be
>>> redefined. When upper layer drivers call in/out with those known legacy port
>>> addresses to access the peripherals, the hooking functions corrresponding to
>>> those target peripherals will be called. Through this way, those upper layer
>>> drivers which depend on in/out can run on Hip06 without any changes.
>>
>> As above, this has nothing to do with arm64, and as such, should live in
>> generic code, exactly as we would do if we had higher-level ISA
>> accessor ops.
>>
>> Regardless, given the multi-instance case, I don't think this is
>> sufficient in general (and I think we need higher-level ISA accessors
>> to handle the indirection).
>
> Multi-instance with IO is tricky to do generically because archs already
> have all sort of hacks to deal with the fact that inb/outb don't require
> an explicit ioremap, so an IO resource can take all sort of shape depending
> on the arch.
>
> Overall it boils down to applying some kind of per-instance "offset" to
> the IO port number though.
>
next prev parent reply other threads:[~2016-11-10 8:33 UTC|newest]
Thread overview: 263+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-08 3:47 [PATCH V5 0/3] ARM64 LPC: legacy ISA I/O support zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 12:03 ` Mark Rutland
2016-11-08 12:03 ` Mark Rutland
2016-11-08 12:03 ` Mark Rutland
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-10 8:33 ` zhichang.yuan [this message]
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 11:22 ` Mark Rutland
2016-11-10 11:22 ` Mark Rutland
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-11 10:07 ` zhichang.yuan
2016-11-11 10:07 ` zhichang.yuan
2016-11-11 10:07 ` zhichang.yuan
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:38 ` Arnd Bergmann
2016-11-18 11:38 ` Arnd Bergmann
2016-11-21 12:58 ` John Garry
2016-11-21 12:58 ` John Garry
2016-11-21 12:58 ` John Garry
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:49 ` Will Deacon
2016-11-08 16:49 ` Will Deacon
2016-11-08 17:05 ` John Garry
2016-11-08 17:05 ` John Garry
2016-11-08 17:05 ` John Garry
2016-11-08 22:35 ` Arnd Bergmann
2016-11-08 22:35 ` Arnd Bergmann
2016-11-08 22:35 ` Arnd Bergmann
2016-11-09 11:29 ` John Garry
2016-11-09 11:29 ` John Garry
2016-11-09 11:29 ` John Garry
2016-11-09 21:33 ` Arnd Bergmann
2016-11-09 21:33 ` Arnd Bergmann
2016-11-09 21:33 ` Arnd Bergmann
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-07 1:25 ` 答复: " Yuanzhichang
2016-11-08 3:47 ` [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 11:49 ` Mark Rutland
2016-11-08 11:49 ` Mark Rutland
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 17:10 ` Mark Rutland
2016-11-08 17:10 ` Mark Rutland
2016-11-08 17:10 ` Mark Rutland
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 21:38 ` Arnd Bergmann
2016-11-09 21:38 ` Arnd Bergmann
2016-11-09 21:38 ` Arnd Bergmann
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-09 11:20 ` Mark Rutland
2016-11-09 11:20 ` Mark Rutland
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-09 11:39 ` liviu.dudau
2016-11-09 11:39 ` liviu.dudau at arm.com
2016-11-09 11:39 ` liviu.dudau-5wv7dgnIgG8
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:50 ` liviu.dudau
2016-11-09 16:50 ` liviu.dudau at arm.com
2016-11-09 16:50 ` liviu.dudau-5wv7dgnIgG8
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-11 10:37 ` liviu.dudau
2016-11-11 10:37 ` liviu.dudau at arm.com
2016-11-11 10:37 ` liviu.dudau
2016-11-08 3:47 ` [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06 zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 6:11 ` kbuild test robot
2016-11-08 6:11 ` kbuild test robot
2016-11-08 6:11 ` kbuild test robot
2016-11-08 16:24 ` Arnd Bergmann
2016-11-08 16:24 ` Arnd Bergmann
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 12:36 ` zhichang.yuan
2016-11-10 12:36 ` zhichang.yuan
2016-11-10 12:36 ` zhichang.yuan
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:48 ` liviu.dudau
2016-11-11 10:48 ` liviu.dudau at arm.com
2016-11-11 10:48 ` liviu.dudau
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 14:45 ` liviu.dudau
2016-11-11 14:45 ` liviu.dudau at arm.com
2016-11-11 14:45 ` liviu.dudau-5wv7dgnIgG8
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 18:16 ` liviu.dudau
2016-11-11 18:16 ` liviu.dudau at arm.com
2016-11-11 18:16 ` liviu.dudau
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 11:26 ` liviu.dudau
2016-11-14 11:26 ` liviu.dudau at arm.com
2016-11-14 11:26 ` liviu.dudau
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-14 11:06 ` One Thousand Gnomes
2016-11-14 11:06 ` One Thousand Gnomes
2016-11-14 11:06 ` One Thousand Gnomes
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