From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Mark Rutland <mark.rutland@arm.com>,
"zhichang.yuan" <yuanzhichang@hisilicon.com>
Cc: gabriele.paoloni@huawei.com, catalin.marinas@arm.com,
will.deacon@arm.com, linuxarm@huawei.com,
lorenzo.pieralisi@arm.com, arnd@arndb.de, xuwei5@hisilicon.com,
linux-serial@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, minyard@acm.org,
marc.zyngier@arm.com, liviu.dudau@arm.com, john.garry@huawei.com,
zourongrong@gmail.com, robh+dt@kernel.org, bhelgaas@google.com,
kantyzc@163.com, zhichang.yuan02@gmail.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, olof@lixom.net
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Wed, 09 Nov 2016 10:12:59 +1100 [thread overview]
Message-ID: <1478646779.7430.66.camel@kernel.crashing.org> (raw)
In-Reply-To: <20161108114953.GB15297@leverpostej>
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WARNING: multiple messages have this Message-ID (diff)
From: Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"zhichang.yuan"
<yuanzhichang-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
Cc: catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
olof-nZhT3qVonbNeoWH0uzbU5w@public.gmane.org,
arnd-r2nGTMty4D4@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linuxarm-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
minyard-HInyCGIudOg@public.gmane.org,
liviu.dudau-5wv7dgnIgG8@public.gmane.org,
zourongrong-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
john.garry-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
gabriele.paoloni-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
zhichang.yuan02-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
kantyzc-9Onoh4P/yGk@public.gmane.org,
xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
marc.zyngier-5wv7dgnIgG8@public.gmane.org
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Wed, 09 Nov 2016 10:12:59 +1100 [thread overview]
Message-ID: <1478646779.7430.66.camel@kernel.crashing.org> (raw)
In-Reply-To: <20161108114953.GB15297@leverpostej>
On Tue, 2016-11-08 at 11:49 +0000, Mark Rutland wrote:
>
> My understanding of ISA (which may be flawed) is that it's not part of
> the PCI host bridge, but rather on x86 it happens to share the IO space
> with PCI.
Sort-of. On some systems it actually goes through PCI and there's a
PCI->ISA bridge that uses substractive decoding to the legacy devices.
> So, how about this becomes:
>
> Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
> provides access to some legacy ISA devices.
>
> I believe that we could theoretically have multiple independent LPC/ISA
> busses, as is possible with PCI on !x86 systems. If the current ISA code
> assumes a singleton bus, I think that's something that needs to be fixed
> up more generically.
>
> I don't see why we should need any architecture-specific code here. Why
> can we not fix up the ISA bus code in drivers/of/address.c such that it
> handles multiple ISA bus instances, and translates all sub-device
> addresses relative to the specific bus instance?
What in that code prevents that today ?
Cheers,
Ben.
--
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WARNING: multiple messages have this Message-ID (diff)
From: benh@kernel.crashing.org (Benjamin Herrenschmidt)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Wed, 09 Nov 2016 10:12:59 +1100 [thread overview]
Message-ID: <1478646779.7430.66.camel@kernel.crashing.org> (raw)
In-Reply-To: <20161108114953.GB15297@leverpostej>
On Tue, 2016-11-08 at 11:49 +0000, Mark Rutland wrote:
>
> My understanding of ISA (which may be flawed) is that it's not part of
> the PCI host bridge, but rather on x86 it happens to share the IO space
> with PCI.
Sort-of. On some systems it actually goes through PCI and there's a
PCI->ISA bridge that uses substractive decoding to the legacy devices.
> So, how about this becomes:
>
> ? Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
> ? provides access to some legacy ISA devices.
>
> I believe that we could theoretically have multiple independent LPC/ISA
> busses, as is possible with PCI on !x86 systems. If the current ISA code
> assumes a singleton bus, I think that's something that needs to be fixed
> up more generically.
>
> I don't see why we should need any architecture-specific code here. Why
> can we not fix up the ISA bus code in drivers/of/address.c such that it
> handles multiple ISA bus instances, and translates all sub-device
> addresses relative to the specific bus instance?
What in that code prevents that today ?
Cheers,
Ben.
WARNING: multiple messages have this Message-ID (diff)
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Mark Rutland <mark.rutland@arm.com>,
"zhichang.yuan" <yuanzhichang@hisilicon.com>
Cc: catalin.marinas@arm.com, will.deacon@arm.com, robh+dt@kernel.org,
bhelgaas@google.com, olof@lixom.net, arnd@arndb.de,
linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com,
linux-kernel@vger.kernel.org, linuxarm@huawei.com,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-serial@vger.kernel.org, minyard@acm.org,
liviu.dudau@arm.com, zourongrong@gmail.com,
john.garry@huawei.com, gabriele.paoloni@huawei.com,
zhichang.yuan02@gmail.com, kantyzc@163.com, xuwei5@hisilicon.com,
marc.zyngier@arm.com
Subject: Re: [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA
Date: Wed, 09 Nov 2016 10:12:59 +1100 [thread overview]
Message-ID: <1478646779.7430.66.camel@kernel.crashing.org> (raw)
In-Reply-To: <20161108114953.GB15297@leverpostej>
On Tue, 2016-11-08 at 11:49 +0000, Mark Rutland wrote:
>
> My understanding of ISA (which may be flawed) is that it's not part of
> the PCI host bridge, but rather on x86 it happens to share the IO space
> with PCI.
Sort-of. On some systems it actually goes through PCI and there's a
PCI->ISA bridge that uses substractive decoding to the legacy devices.
> So, how about this becomes:
>
> Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which
> provides access to some legacy ISA devices.
>
> I believe that we could theoretically have multiple independent LPC/ISA
> busses, as is possible with PCI on !x86 systems. If the current ISA code
> assumes a singleton bus, I think that's something that needs to be fixed
> up more generically.
>
> I don't see why we should need any architecture-specific code here. Why
> can we not fix up the ISA bus code in drivers/of/address.c such that it
> handles multiple ISA bus instances, and translates all sub-device
> addresses relative to the specific bus instance?
What in that code prevents that today ?
Cheers,
Ben.
next prev parent reply other threads:[~2016-11-08 23:12 UTC|newest]
Thread overview: 263+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-08 3:47 [PATCH V5 0/3] ARM64 LPC: legacy ISA I/O support zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` [PATCH V5 1/3] ARM64 LPC: Indirect ISA port IO introduced zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 12:03 ` Mark Rutland
2016-11-08 12:03 ` Mark Rutland
2016-11-08 12:03 ` Mark Rutland
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:09 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 16:15 ` Arnd Bergmann
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-08 23:16 ` Benjamin Herrenschmidt
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 8:33 ` zhichang.yuan
2016-11-10 11:22 ` Mark Rutland
2016-11-10 11:22 ` Mark Rutland
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-10 19:32 ` Benjamin Herrenschmidt
2016-11-11 10:07 ` zhichang.yuan
2016-11-11 10:07 ` zhichang.yuan
2016-11-11 10:07 ` zhichang.yuan
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 9:20 ` Arnd Bergmann
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:12 ` zhichang.yuan
2016-11-18 11:38 ` Arnd Bergmann
2016-11-18 11:38 ` Arnd Bergmann
2016-11-21 12:58 ` John Garry
2016-11-21 12:58 ` John Garry
2016-11-21 12:58 ` John Garry
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:12 ` Will Deacon
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:33 ` John Garry
2016-11-08 16:49 ` Will Deacon
2016-11-08 16:49 ` Will Deacon
2016-11-08 17:05 ` John Garry
2016-11-08 17:05 ` John Garry
2016-11-08 17:05 ` John Garry
2016-11-08 22:35 ` Arnd Bergmann
2016-11-08 22:35 ` Arnd Bergmann
2016-11-08 22:35 ` Arnd Bergmann
2016-11-09 11:29 ` John Garry
2016-11-09 11:29 ` John Garry
2016-11-09 11:29 ` John Garry
2016-11-09 21:33 ` Arnd Bergmann
2016-11-09 21:33 ` Arnd Bergmann
2016-11-09 21:33 ` Arnd Bergmann
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-22 8:15 ` Ming Lei
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 1:43 ` zhichang.yuan
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2016-12-23 7:24 ` Ming Lei
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-06 11:43 ` Arnd Bergmann
2017-01-07 1:25 ` 答复: " Yuanzhichang
2016-11-08 3:47 ` [PATCH V5 2/3] ARM64 LPC: Add missing range exception for special ISA zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:17 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 5:27 ` kbuild test robot
2016-11-08 11:49 ` Mark Rutland
2016-11-08 11:49 ` Mark Rutland
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 16:19 ` Arnd Bergmann
2016-11-08 17:10 ` Mark Rutland
2016-11-08 17:10 ` Mark Rutland
2016-11-08 17:10 ` Mark Rutland
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 13:54 ` One Thousand Gnomes
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 14:51 ` Gabriele Paoloni
2016-11-09 21:38 ` Arnd Bergmann
2016-11-09 21:38 ` Arnd Bergmann
2016-11-09 21:38 ` Arnd Bergmann
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-14 11:11 ` One Thousand Gnomes
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-18 9:22 ` Arnd Bergmann
2016-11-08 23:12 ` Benjamin Herrenschmidt [this message]
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-08 23:12 ` Benjamin Herrenschmidt
2016-11-09 11:20 ` Mark Rutland
2016-11-09 11:20 ` Mark Rutland
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-10 7:08 ` Benjamin Herrenschmidt
2016-11-09 11:39 ` liviu.dudau
2016-11-09 11:39 ` liviu.dudau at arm.com
2016-11-09 11:39 ` liviu.dudau-5wv7dgnIgG8
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:16 ` Gabriele Paoloni
2016-11-09 16:50 ` liviu.dudau
2016-11-09 16:50 ` liviu.dudau at arm.com
2016-11-09 16:50 ` liviu.dudau-5wv7dgnIgG8
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 6:24 ` zhichang.yuan
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-10 16:06 ` Gabriele Paoloni
2016-11-11 10:37 ` liviu.dudau
2016-11-11 10:37 ` liviu.dudau at arm.com
2016-11-11 10:37 ` liviu.dudau
2016-11-08 3:47 ` [PATCH V5 3/3] ARM64 LPC: LPC driver implementation on Hip06 zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 3:47 ` zhichang.yuan
2016-11-08 6:11 ` kbuild test robot
2016-11-08 6:11 ` kbuild test robot
2016-11-08 6:11 ` kbuild test robot
2016-11-08 16:24 ` Arnd Bergmann
2016-11-08 16:24 ` Arnd Bergmann
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 12:10 ` Gabriele Paoloni
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-09 21:34 ` Arnd Bergmann
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 6:40 ` zhichang.yuan
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 9:12 ` Arnd Bergmann
2016-11-10 12:36 ` zhichang.yuan
2016-11-10 12:36 ` zhichang.yuan
2016-11-10 12:36 ` zhichang.yuan
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-18 11:46 ` Arnd Bergmann
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 15:36 ` Gabriele Paoloni
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-10 16:07 ` Arnd Bergmann
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:09 ` zhichang.yuan
2016-11-11 10:48 ` liviu.dudau
2016-11-11 10:48 ` liviu.dudau at arm.com
2016-11-11 10:48 ` liviu.dudau
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 13:39 ` Gabriele Paoloni
2016-11-11 14:45 ` liviu.dudau
2016-11-11 14:45 ` liviu.dudau at arm.com
2016-11-11 14:45 ` liviu.dudau-5wv7dgnIgG8
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 15:53 ` Gabriele Paoloni
2016-11-11 18:16 ` liviu.dudau
2016-11-11 18:16 ` liviu.dudau at arm.com
2016-11-11 18:16 ` liviu.dudau
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 8:26 ` Gabriele Paoloni
2016-11-14 11:26 ` liviu.dudau
2016-11-14 11:26 ` liviu.dudau at arm.com
2016-11-14 11:26 ` liviu.dudau
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 10:17 ` Arnd Bergmann
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:07 ` Gabriele Paoloni
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:24 ` Arnd Bergmann
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 12:53 ` Gabriele Paoloni
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 13:42 ` Arnd Bergmann
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:18 ` Gabriele Paoloni
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 16:34 ` Arnd Bergmann
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-18 17:03 ` Gabriele Paoloni
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 14:16 ` Arnd Bergmann
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 15:22 ` Gabriele Paoloni
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 17:07 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-23 23:23 ` Arnd Bergmann
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 9:12 ` zhichang.yuan
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-24 10:24 ` Arnd Bergmann
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 8:46 ` Gabriele Paoloni
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 12:03 ` Arnd Bergmann
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-25 16:27 ` Gabriele Paoloni
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-11 16:54 ` zhichang.yuan
2016-11-14 11:06 ` One Thousand Gnomes
2016-11-14 11:06 ` One Thousand Gnomes
2016-11-14 11:06 ` One Thousand Gnomes
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