From: puck.chen@hisilicon.com (Chen Feng)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Date: Fri, 6 Jan 2017 08:59:19 +0800 [thread overview]
Message-ID: <586EEBE7.4050709@hisilicon.com> (raw)
In-Reply-To: <20170105141456.GA5710@hector.attlocal.net>
On 2017/1/5 22:14, Andy Gross wrote:
> On Mon, Dec 26, 2016 at 05:36:12PM +0800, Chen Feng wrote:
>> Add initial dtsi file to support Hisilicon Hi3660 SoC with
>> support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).
>>
>> Also add dts file to support HiKey960 development board which
>> based on Hi3660 SoC.
>> The output console is earlycon "earlycon=pl011,0xfdf05000".
>> And the con_init uart5 with a fixed clock, which already
>> configured at bootloader.
>>
>> When clock is available, the uart5 will be modified.
>>
>> Tested on HiKey960 Board.
>>
>> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
>> ---
>> arch/arm64/boot/dts/hisilicon/Makefile | 1 +
>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++
>> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++
>> 3 files changed, 191 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
>> index d5f43a0..b633b5d 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -1,4 +1,5 @@
>> dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
>> dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>> dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> new file mode 100644
>> index 0000000..3d7aead
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> @@ -0,0 +1,34 @@
>> +/*
>> + * dts file for Hisilicon HiKey960 Development Board
>> + *
>> + * Copyright (C) 2016, Hisilicon Ltd.
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "hi3660.dtsi"
>> +
>> +/ {
>> + model = "HiKey960";
>> + compatible = "hisilicon,hi3660";
>> +
>> + aliases {
>> + serial5 = &uart5; /* console UART */
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial5:115200n8";
>> + };
>> +
>> + memory at 0 {
>> + device_type = "memory";
>> + reg = <0x0 0x00400000 0x0 0xBFE00000>;
>
> Use lower case letters for hex numbers. 0xbfe00000.
>
ok, thanks!
>> + };
>> +
>> + soc {
>> + uart5: uart at fdf05000 {
>> + status = "ok";
>> + };
>> + };
>> +};
>
> <snip>
>
> Regards,
>
> Andy
>
> .
>
WARNING: multiple messages have this Message-ID (diff)
From: Chen Feng <puck.chen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
To: Andy Gross <andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
catalin.marinas-5wv7dgnIgG8@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
suzhuangluan-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org,
xuyiping-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org
Subject: Re: [RESEND 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Date: Fri, 6 Jan 2017 08:59:19 +0800 [thread overview]
Message-ID: <586EEBE7.4050709@hisilicon.com> (raw)
In-Reply-To: <20170105141456.GA5710-3KkwrOJo9xYlRp7syxWybdHuzzzSOjJt@public.gmane.org>
On 2017/1/5 22:14, Andy Gross wrote:
> On Mon, Dec 26, 2016 at 05:36:12PM +0800, Chen Feng wrote:
>> Add initial dtsi file to support Hisilicon Hi3660 SoC with
>> support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).
>>
>> Also add dts file to support HiKey960 development board which
>> based on Hi3660 SoC.
>> The output console is earlycon "earlycon=pl011,0xfdf05000".
>> And the con_init uart5 with a fixed clock, which already
>> configured at bootloader.
>>
>> When clock is available, the uart5 will be modified.
>>
>> Tested on HiKey960 Board.
>>
>> Signed-off-by: Chen Feng <puck.chen-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
>> ---
>> arch/arm64/boot/dts/hisilicon/Makefile | 1 +
>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++
>> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++
>> 3 files changed, 191 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
>> index d5f43a0..b633b5d 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -1,4 +1,5 @@
>> dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
>> dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>> dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> new file mode 100644
>> index 0000000..3d7aead
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> @@ -0,0 +1,34 @@
>> +/*
>> + * dts file for Hisilicon HiKey960 Development Board
>> + *
>> + * Copyright (C) 2016, Hisilicon Ltd.
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "hi3660.dtsi"
>> +
>> +/ {
>> + model = "HiKey960";
>> + compatible = "hisilicon,hi3660";
>> +
>> + aliases {
>> + serial5 = &uart5; /* console UART */
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial5:115200n8";
>> + };
>> +
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x00400000 0x0 0xBFE00000>;
>
> Use lower case letters for hex numbers. 0xbfe00000.
>
ok, thanks!
>> + };
>> +
>> + soc {
>> + uart5: uart@fdf05000 {
>> + status = "ok";
>> + };
>> + };
>> +};
>
> <snip>
>
> Regards,
>
> Andy
>
> .
>
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WARNING: multiple messages have this Message-ID (diff)
From: Chen Feng <puck.chen@hisilicon.com>
To: Andy Gross <andy.gross@linaro.org>
Cc: <xuwei5@hisilicon.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <catalin.marinas@arm.com>,
<will.deacon@arm.com>, <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<suzhuangluan@hisilicon.com>, <xuyiping@hisilicon.com>
Subject: Re: [RESEND 2/2] arm64: dts: Add dts files for Hisilicon Hi3660 SoC
Date: Fri, 6 Jan 2017 08:59:19 +0800 [thread overview]
Message-ID: <586EEBE7.4050709@hisilicon.com> (raw)
In-Reply-To: <20170105141456.GA5710@hector.attlocal.net>
On 2017/1/5 22:14, Andy Gross wrote:
> On Mon, Dec 26, 2016 at 05:36:12PM +0800, Chen Feng wrote:
>> Add initial dtsi file to support Hisilicon Hi3660 SoC with
>> support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).
>>
>> Also add dts file to support HiKey960 development board which
>> based on Hi3660 SoC.
>> The output console is earlycon "earlycon=pl011,0xfdf05000".
>> And the con_init uart5 with a fixed clock, which already
>> configured at bootloader.
>>
>> When clock is available, the uart5 will be modified.
>>
>> Tested on HiKey960 Board.
>>
>> Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
>> ---
>> arch/arm64/boot/dts/hisilicon/Makefile | 1 +
>> arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 34 +++++
>> arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 156 ++++++++++++++++++++++
>> 3 files changed, 191 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> create mode 100644 arch/arm64/boot/dts/hisilicon/hi3660.dtsi
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/Makefile b/arch/arm64/boot/dts/hisilicon/Makefile
>> index d5f43a0..b633b5d 100644
>> --- a/arch/arm64/boot/dts/hisilicon/Makefile
>> +++ b/arch/arm64/boot/dts/hisilicon/Makefile
>> @@ -1,4 +1,5 @@
>> dtb-$(CONFIG_ARCH_HISI) += hi6220-hikey.dtb
>> +dtb-$(CONFIG_ARCH_HISI) += hi3660-hikey960.dtb
>> dtb-$(CONFIG_ARCH_HISI) += hip05-d02.dtb
>> dtb-$(CONFIG_ARCH_HISI) += hip06-d03.dtb
>>
>> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> new file mode 100644
>> index 0000000..3d7aead
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
>> @@ -0,0 +1,34 @@
>> +/*
>> + * dts file for Hisilicon HiKey960 Development Board
>> + *
>> + * Copyright (C) 2016, Hisilicon Ltd.
>> + *
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "hi3660.dtsi"
>> +
>> +/ {
>> + model = "HiKey960";
>> + compatible = "hisilicon,hi3660";
>> +
>> + aliases {
>> + serial5 = &uart5; /* console UART */
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial5:115200n8";
>> + };
>> +
>> + memory@0 {
>> + device_type = "memory";
>> + reg = <0x0 0x00400000 0x0 0xBFE00000>;
>
> Use lower case letters for hex numbers. 0xbfe00000.
>
ok, thanks!
>> + };
>> +
>> + soc {
>> + uart5: uart@fdf05000 {
>> + status = "ok";
>> + };
>> + };
>> +};
>
> <snip>
>
> Regards,
>
> Andy
>
> .
>
next prev parent reply other threads:[~2017-01-06 0:59 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-26 9:36 [RESEND 1/2] document: dt: add binding for Hi3660 SoC Chen Feng
2016-12-26 9:36 ` Chen Feng
2016-12-26 9:36 ` Chen Feng
2016-12-26 9:36 ` [RESEND 2/2] arm64: dts: Add dts files for Hisilicon " Chen Feng
2016-12-26 9:36 ` Chen Feng
2016-12-26 9:36 ` Chen Feng
2017-01-05 3:28 ` Chen Feng
2017-01-05 3:28 ` Chen Feng
2017-01-05 3:28 ` Chen Feng
2017-01-05 9:40 ` Will Deacon
2017-01-05 9:40 ` Will Deacon
2017-01-05 9:40 ` Will Deacon
2017-01-05 14:14 ` Andy Gross
2017-01-05 14:14 ` Andy Gross
2017-01-05 14:14 ` Andy Gross
2017-01-06 0:59 ` Chen Feng [this message]
2017-01-06 0:59 ` Chen Feng
2017-01-06 0:59 ` Chen Feng
2017-01-03 16:52 ` [RESEND 1/2] document: dt: add binding for " Rob Herring
2017-01-03 16:52 ` Rob Herring
2017-01-03 16:52 ` Rob Herring
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